Table 6: SOM240_2 Signal Pins (cont'd)
Pin Number Signal Name Signal Description
D10 GTH_DP0_M2C_N GTH Lane 0 TX
D11 GND Ground
D12 HPB01_P HPIO on bank 65
D13 HPB01_N HPIO on bank 65
D14 GND Ground
D15 HPB00_CC_P HPIO on bank 65
D16 HPB00_CC_N HPIO on bank 65
D17 GND Ground
D18 HPB_CLK0_P HPIO global clock pin on bank 65
D19 HPB_CLK0_N HPIO global clock pin on bank 65
D20 GND Ground
D21 HPB04_P HPIO on bank 65
D22 HPB04_N HPIO on bank 65
D23 GND Ground
D24 HPB17_P HPIO on bank 65
D25 HPB17_N HPIO on bank 65
D26 GND Ground
D27 HPC09_P HPIO on bank 64
D28 HPC09_N HPIO on bank 64
D29 GND Ground
D30 HPC01_P HPIO on bank 64
D31 HPC01_N HPIO on bank 64
D32 GND Ground
D33 HPC00_CC_P HPIO clock-capable pin on bank 64
D34 HPC00_CC_N HPIO clock-capable pin on bank 64
D35 GND Ground
D36 HPC02_P HPIO on bank 64
D37 HPC02_N HPIO on bank 64
D38 GND Ground
D39 HPC04_P HPIO on bank 64
D40 HPC04_N HPIO on bank 64
D41 GND Ground
D42 VCCO_HPC HPC I/O voltage rail, 1.0V to 1.8V
D43 GND Ground
D44 HDB00_CC HDIO clock-capable pin on bank 43
D45 HDB01 HDIO on bank 43
D46 HDB02 HDIO on bank 43
D47 GND Ground
D48 HDB03 HDIO on bank 43
Chapter 2: Electrical Design Considerations
UG1091 (v1.0) April 20, 2021 www.xilinx.com
Carrier Card Design for Kria SOM 24
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