Xilinx Kria K26 SOM User Manual

Figure 1: K26 SOM Block Diagram
Block RAM
(slave)
2-way Cache
Coherent Master
APU
MPCore
M
To all output
ports
CCI
Coherency
And Bypass
RPU
GIC
TCMs
OCM
Switch
USB0 w/DMA
USB1 w/DMA
LPD DMA
PS SysMon eFUSE
LPD SLCRs
IPI
LPD Units
RTC
IOP Inbound
IOP Outbound
OCM Memory
S0
DAP Controller
APB
APB
S
S1
CSU Processor
PMU Processor
AXI
Quad-SPI
GEM x4
NAND
SDIO x2
IOP with Masters
IOP Units
UART x2
SPI x2
CAN x2 I2C x2
IOP Slave-only
S
S
TBU2
Programmable
Logic
S2
FPD SLCRs
FPD configs
DDR Memory Controller
SMMU TCU
S4 S5S3
DisplayPort
FPD DMA
TBU5
CoreSight
S2
S3 S4
DVMM2 M1 M0
S0
S1
PCIe
SATA
AXI Stream
GPU PPs
LPD Outbound
LPD Inbound
S
M_AXI_HPM0_LPD
S_AXI_LPD
S_AXI_HP3_FPD S_AXI_HP2_FPD S_AXI_HP1_FPD S_AXI_HP0_FPD
S_AXI_ACP_FPD
S_AXI_ACE_FPD
S_AXI_HPC0_FPD S_AXI_HPC1_FPD
M_AXI_HPM0_FPD M_AXI_HPM1_FPD
I/O Coherent
Master
GPU CFG
LPD Main
Switch
RPU
Switch
Full crossbar.
Each input to all
output ports.
Full crossbar.
To all output ports.
GPIO x78, x96
FPD
Main
Switch
AXI Stream
SIOU Outbound
APB
Non-Coherent
Master
RPU
M
M
TTC x4 LPD SWDT
M M
TBU3 TBU4
TBU1 TBU0
VCU RF PCIe v3.1 100Gb
PL SysMon
IOP Outbound to FPD register:
IOU_INTERCONNECT_ROUTE
DDR4
(1 GB)
DDR4
(1 GB)
DDR4
(1 GB)
DDR4
(1 GB)
x16
x16
QSPI
(512 Mb)
TPM2.0
eMMC
(16 GB)
x4
x8
EEPROM
Connector 1 Connnector 2
I2C
x4 PS-GTR
x49 MIO
32.768 kHz
Oscillator
33.33 MHz
Oscillator
x4 GTH
x21 HDIO
x48 HDIO
x32 HPIO (x16 differential pairs)
x84 HPIO
(42 differential
pairs)
SPI
x16
x16
Xilinx MPSoC
APB
X24999-032421
Chapter 1: Introduction
UG1091 (v1.0) April 20, 2021 www.xilinx.com
Carrier Card Design for Kria SOM 6
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Xilinx Kria K26 SOM Specifications

General

Brand	Xilinx
Model	Kria K26 SOM
Category	Carrier boards
Language	English