Xilinx VC707 - Page 87

VC707 Evaluation Board www.xilinx.com 87
UG885 (v1.4) May 12, 2014
VC707 Board XDC Listing
set_property PACKAGE_PIN BB39 [get_ports FLASH_A23]
set_property IOSTANDARD LVCMOS18 [get_ports FLASH_A23]
set_property PACKAGE_PIN AW42 [get_ports FLASH_A24]
set_property IOSTANDARD LVCMOS18 [get_ports FLASH_A24]
set_property PACKAGE_PIN AW41 [get_ports FLASH_A25]
set_property IOSTANDARD LVCMOS18 [get_ports FLASH_A25]
set_property PACKAGE_PIN AY37 [get_ports FLASH_ADV_B]
set_property IOSTANDARD LVCMOS18 [get_ports FLASH_ADV_B]
set_property PACKAGE_PIN BA41 [get_ports FLASH_OE_B]
set_property IOSTANDARD LVCMOS18 [get_ports FLASH_OE_B]
set_property PACKAGE_PIN BB41 [get_ports FLASH_FWE_B]
set_property IOSTANDARD LVCMOS18 [get_ports FLASH_FWE_B]
set_property PACKAGE_PIN AP37 [get_ports FPGA_EMCCLK]
set_property IOSTANDARD LVCMOS18 [get_ports FPGA_EMCCLK]
#SDIO
set_property PACKAGE_PIN AR30 [get_ports SDIO_DAT0_LS]
set_property IOSTANDARD LVCMOS18 [get_ports SDIO_DAT0_LS]
set_property PACKAGE_PIN AT30 [get_ports SDIO_CD_DAT3_LS]
set_property IOSTANDARD LVCMOS18 [get_ports SDIO_CD_DAT3_LS]
set_property PACKAGE_PIN AU31 [get_ports SDIO_DAT1_LS]
set_property IOSTANDARD LVCMOS18 [get_ports SDIO_DAT1_LS]
set_property PACKAGE_PIN AV31 [get_ports SDIO_DAT2_LS]
set_property IOSTANDARD LVCMOS18 [get_ports SDIO_DAT2_LS]
set_property PACKAGE_PIN AN30 [get_ports SDIO_CLK_LS]
set_property IOSTANDARD LVCMOS18 [get_ports SDIO_CLK_LS]
set_property PACKAGE_PIN AP30 [get_ports SDIO_CMD_LS]
set_property IOSTANDARD LVCMOS18 [get_ports SDIO_CMD_LS]
set_property PACKAGE_PIN AP32 [get_ports SDIO_SDDET]
set_property IOSTANDARD LVCMOS18 [get_ports SDIO_SDDET]
set_property PACKAGE_PIN AR32 [get_ports SDIO_SDWP]
set_property IOSTANDARD LVCMOS18 [get_ports SDIO_SDWP]
#PMBUS
set_property PACKAGE_PIN AV38 [get_ports PMBUS_ALERT_LS]
set_property IOSTANDARD LVCMOS18 [get_ports PMBUS_ALERT_LS]
set_property PACKAGE_PIN AY39 [get_ports PMBUS_DATA_LS]
set_property IOSTANDARD LVCMOS18 [get_ports PMBUS_DATA_LS]
set_property PACKAGE_PIN AW37 [get_ports PMBUS_CLK_LS]
set_property IOSTANDARD LVCMOS18 [get_ports PMBUS_CLK_LS]
#SFP
set_property PACKAGE_PIN AP33 [get_ports SFP_TX_DISABLE]
set_property IOSTANDARD LVCMOS18 [get_ports SFP_TX_DISABLE]
set_property PACKAGE_PIN BB38 [get_ports SFP_LOS_LS]
set_property IOSTANDARD LVCMOS18 [get_ports SFP_LOS_LS]
set_property PACKAGE_PIN AM4 [get_ports SFP_TX_P]
set_property PACKAGE_PIN AL6 [get_ports SFP_RX_P]
set_property PACKAGE_PIN AM3 [get_ports SFP_TX_N]
set_property PACKAGE_PIN AL5 [get_ports SFP_RX_N]
#PCIE
set_property PACKAGE_PIN AV33 [get_ports PCIE_WAKE_B_LS]
set_property IOSTANDARD LVCMOS18 [get_ports PCIE_WAKE_B_LS]
set_property PACKAGE_PIN AV35 [get_ports PCIE_PERST_LS]
set_property IOSTANDARD LVCMOS18 [get_ports PCIE_PERST_LS]
set_property PACKAGE_PIN AG2 [get_ports PCIE_TX4_P]
set_property PACKAGE_PIN AD4 [get_ports PCIE_RX4_P]
set_property PACKAGE_PIN AG1 [get_ports PCIE_TX4_N]
Send Feedback