ZCU104 Board User Guide 2
UG1267 (v1.1) October 9, 2018 www.xilinx.com
Revision History
The following table shows the revision history for this document.
Date Version Revision
10/09/2018 1.1 Chapter 2: Added Electrostatic Discharge Caution.
Chapter 3: Updated introductory paragraphs in PS-Side: DDR4 Component
Memory and PL-Side: DDR4 SODIMM Socket. In Table 3-12, updated
GTR_REF_CLK_USB3 frequency to 26 MHz. In Table 3-24, replaced LVCMOS12 and
LVCMOS18 with LVCMOS33.
Appendix B: Updated appendix title and Overview. Removed ZCU104 Board
Constraints File section.
Appendix C: Updated Overview.
Appendix D: Added Zynq UltraScale+ MPSoC Data Sheet: DC and AC Switching
Characteristics (DS925) to References.
04/04/2018 1.0 Initial Xilinx release.
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