Xilinx ZCU104 - Page 32

ZCU104 Board User Guide 32
UG1267 (v1.1) October 9, 2018 www.xilinx.com
Chapter 3: Board Component Descriptions
AH18 DDR4_SODIMM_DM0_B POD12_DCI 12 DM0_N/DBI0_N
AD15 DDR4_SODIMM_DM1_B POD12_DCI 33 DM1_N/DBI1_N
AM16 DDR4_SODIMM_DM2_B POD12_DCI 54 DM2_N/DBI2_N
AP18 DDR4_SODIMM_DM3_B POD12_DCI 75 DM3_N/DBI3_N
AE18 DDR4_SODIMM_DM4_B POD12_DCI 178 DM4_N/DBI4_N
AH22 DDR4_SODIMM_DM5_B POD12_DCI 199 DM5_N/DBI5_N
AL20 DDR4_SODIMM_DM6_B POD12_DCI 220 DM6_N/DBI6_N
AP19 DDR4_SODIMM_DM7_B POD12_DCI 241 DM7_N/DBI7_N
AH14 DDR4_SODIMM_DQS0_T DIFF_POD12_DCI 13 DQS0_T
AJ14 DDR4_SODIMM_DQS0_C DIFF_POD12_DCI 11 DQS0_C
AA16 DDR4_SODIMM_DQS1_T DIFF_POD12_DCI 34 DQS1_T
AA15 DDR4_SODIMM_DQS1_C DIFF_POD12_DCI 32 DQS1_C
AK15 DDR4_SODIMM_DQS2_T DIFF_POD12_DCI 55 DQS2_T
AK14 DDR4_SODIMM_DQS2_C DIFF_POD12_DCI 53 DQS2_C
AM14 DDR4_SODIMM_DQS3_T DIFF_POD12_DCI 76 DQS3_T
AN14 DDR4_SODIMM_DQS3_C DIFF_POD12_DCI 74 DQS3_C
AA18 DDR4_SODIMM_DQS4_T DIFF_POD12_DCI 179 DQS4_T
AB18 DDR4_SODIMM_DQS4_C DIFF_POD12_DCI 177 DQS4_C
AF23 DDR4_SODIMM_DQS5_T DIFF_POD12_DCI 200 DQS5_T
AG23 DDR4_SODIMM_DQS5_C DIFF_POD12_DCI 198 DQS5_C
AK22 DDR4_SODIMM_DQS6_T DIFF_POD12_DCI 221 DQS6_T
AK23 DDR4_SODIMM_DQS6_C DIFF_POD12_DCI 219 DQS6_C
AM21 DDR4_SODIMM_DQS7_T DIFF_POD12_DCI 242 DQS7_T
AN21 DDR4_SODIMM_DQS7_C DIFF_POD12_DCI 240 DQS7_C
AH11 DDR4_SODIMM_CK0_T DIFF_SSTL12_DCI 139 CK0_C
AJ11 DDR4_SODIMM_CK0_C DIFF_SSTL12_DCI 137 CK0_T
AJ9 DDR4_SODIMM_CK1_T DIFF_SSTL12_DCI 140 CK1_C/NF
AK9 DDR4_SODIMM_CK1_C DIFF_SSTL12_DCI 138 CK1_T/NF
AB13 DDR4_SODIMM_CKE0 SSTL12_DCI 109 CKE0
AL13 DDR4_SODIMM_CKE1 SSTL12_DCI 110 CKE1
AF10 DDR4_SODIMM_ODT0 SSTL12_DCI 155 ODT0
AK13 DDR4_SODIMM_ODT1 SSTL12_DCI 161 ODT1
AF11 DDR4_SODIMM_RAS_B SSTL12_DCI 152 RAS_N/A16
AE12 DDR4_SODIMM_CAS_B SSTL12_DCI 156 CAS_N/A15
Table 3-4: DDR4 SODIMM Socket J1 Connections to FPGA PL Banks 64, 65, and 66 (Cont’d)
XCZU7EV
(U1) Pin
Net Name I/O Standard
DDR4 SODIMM Memory J1
Pin Number Pin Name
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