Zenith Data Systems Z-100 Series - Page 39

Page 3.9
General Theory of Operation
Table 3.2. Interlace Mode Register
BIT 1 BIT2
MODE
0
0
Normal sync mode (non-interlaced)
1
0
Normal sync mode (non-interlaced)
0
1 Interlace sync mode
1 1 Interlace sync and video mode
Table 3.3. Character Skew (Delay) Control
BIT5
o
o
1
1
BIT4
o
1
o
1
MODE
No character skew
1 character skew
2 character skew
Not available
Table 3.4. Cursor Skew (Delay) Control
BIT7
o
o
1
1
BIT6
o
1
o
1
SKEW
No character skew
1 character skew
2 character skew
Not available
• Maximum Scan Line Address Register (R9r This 5-bit, write-only
register controls the number of scan lines per character
row. Since
the first scan line
is 0, the value you enter (15 maximum) must be
1 less than the number of scan lines used for each character. For
example, for 9 scan lines per character, you would enter 8
(9 minus
1). The normal value for this register is 13 (14 scan lines). The default
value for this register
is ODH (13 decimal).