111
Chapter 5 Theory of Operation
System ADC
4
5
U603 is the final stage of a multiplexer used to select the ADC input
source. The rear panel modulation input is applied directly to one of the
multiplexer inputs for the ±1 V input range, and through divider R618
and R620 for the ±5 V input range. Other U603 inputs include ground,
+1.25 V (VREF_d2), MEAS_OA_ADJ from U1903, and three MEAS
lines, each of which are multiplexed signals from the first stage
multiplexers U706, U707, and U708. The multiplexer is controlled by the
MSEL lines from U308.
U603’s output is first buffered by U604-B and then applied to a 3
rd
-order,
low-pass filter. U604-A and associated components form a 2
nd
-order,
Gaussian, low-pass filter at 720 kHz. R613 and C620 form an additional
1-pole filter at 900 kHz. Together, the first two filter sections produce a
frequency response that is flat to 200 kHz. U604-A also shifts the
±1.25 V range of its input to 2.5 ±1.25 V, as required by the analog-to-
digital converter.
The analog-to-digital converter, U606, is clocked at 15 MHz by U605.
On-chip digital filtering reduces the output rate to 468.75 kHz. Output
samples are sent in a serial fashion using ADC_SCLK, ADC_SDATA,
and ADC_DRDY to the Synthesis IC, U1201, where they can be read by
either the DSP or Main Processor. ADC_DVAL is set low if the analog-to-
digital converter’s input is over-driven.
U601 provides the voltage reference. The 2.5 V output of U601 is applied
directly as the reference for the analog-to-digital converter U606.
The 2.5 V is divided by resistors R603 and R604 to 1 V, buffered by U602,
and then used as the reference for the waveform DAC.
Digital-to-analog converter U607 receives serial data from the Synthesis IC,
U1201, using DAC0_CLK, DAC0_STRB*, and DAC0_DATA. The analog
voltage from U607 is applied to multiplexer U608, which is controlled by
AM_nTEDLY from U302, and selects one of two functions for the U607
output. The two functions are:
• Trailing edge delay for fine control of the pulse width
(AM_nTEDLY “low”)
• Summing with V_AMPL (from the System DAC) to form the
V_GAIN± signal used by U1801 to set the amplitude multiplier
factor. This allows the DAC signal to be used for both amplitude
modulation and sine wave flatness correction.
To Next Page
Loading...
Need help?
General
