User Manual
Product information and planning
9500 MPR Rel. 3.1
3DB18809AAAA Issue 1130/980
Interfaces
– 16 E1 G.704 - SCSI Connectors
– 75 ohm or 120 ohm (at NE level)
Block Diagram
(Refer to Figure 47. on page 130).
The 16xE1 ATM streams enter the ASAP unit on the front panel.
The block diagram is divided in 3 parts:
– LIU/Framer
– Network Processor
– Confederation FPGA
The main functions implemented by the LIU/Framer are:
– Internal termination supported: 75 ohm, 120 ohm.
– Line code supported: HDB3.
– Pulse shape: digitally programmable
– Framing to G.704 E1 signals and to CRC-4 multi-frame alignment signals.
– Detection of alarm conditions as loss of signal, loss of frame, loss of signaling multi-frame and loss
of CRC multi-frame.
The Network Processor is the heart of the ASAP card and provides the implementation of the protocols
to be supported as well as data forwarding. ATM-IMA over PseudoWire, SAToP (like on the PDH card),
CESoP, ML-PPP can be supported by the SW application controlling the Data Path and running on a dif
-
ferent MIPS processor embedded on the same chip.
The main function implemented in the confederation FPGA is the clock management.
The right-hand side is the backplane with the 1 Gb bus shared among the other slots and hence common
with the other units (PDH units and Modem units).
Figure 47. ASAP simplified block diagram
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