Alinx AC7015 - Page 27

27 / 31
ZYNQ FPGA Development Platform AC7015 User Manual
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57
PS_MIO10
G16
58
OTG_DATA1
G11
59
GND
-
60
GND
-
61
SD_CLK
E9
62
OTG_DATA2
B11
63
SD_D1
B12
64
OTG_DATA3
F9
65
SD_D0
D15
66
OTG_DATA4
A11
67
SD_CMD
C15
68
OTG_DATA5
B9
69
GND
-
70
GND
-
71
SD_D3
B14
72
OTG_DATA6
F10
73
SD_D2
E10
74
OTG_DATA7
C10
75
-
-
76
-
-
77
FPGA_TMS
H10
78
FPGA_TCK
H11
79
FPGA_TDO
G9
80
FPGA_TDI
H9
Table 2-14-1: Pin Assignment of CON1
CON2 Pin
Signal Name
ZYNQ Pin
Name
CON2 Pin
Signal Name
ZYNQ Pin
Name
1
B34_L19_N
N5
2
B34_L13_N
T1
3
B34_L19_P
N6
4
B34_L13_P
T2
5
B34_L2_P
J7
6
B34_L21_N
N3
7
B34_L2_N
J6
8
B34_L21_P
N4
9
GND
-
10
GND
-
11
B34_L1_P
J8
12
B34_L12_N
L4
13
B34_L1_N
K8
14
B34_L12_P
L5
15
B34_L11_N
K3
16
B35_L4_P
G8
17
B34_L11_P
K4
18
B35_L4_N
G7
19
GND
-
20
GND
-
21
B35_L24_P
H1
22
B35_L19_P
H4
23
B35_L24_N
G1
24
B35_L19_N
H3
25
B34_L8_N
J1
26
B35_L22_P
G3
27
B34_L8_P
J2
28
B35_L22_N
G2
29
GND
-
30
GND
-
31
B35_IO25
H5
32
B35_L21_P
E4