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The ALINX ZYNQ UltraScale+ FPGA Development Board AXU2CGA/B is a compact and versatile development platform designed for a wide range of applications, leveraging the power of Xilinx's Zynq UltraScale+ MPSoCs CG family chip, specifically the XCZU2CG-1SFVC784E model. This board is engineered to provide extensive peripheral connectivity and robust processing capabilities, making it suitable for complex embedded systems development, high-speed data processing, and various other demanding tasks.
At its core, the AXU2CGA/B board serves as a powerful development platform for Zynq UltraScale+ MPSoCs. The XCZU2CG chip integrates both a Processing System (PS) and Programmable Logic (PL) on a single die, offering a hybrid architecture that combines the flexibility of an FPGA with the performance of a multi-core ARM processor.
The PS side of the XCZU2CG-1SFVC784E chip features two ARM Cortex™-A53 processors, capable of speeds up to 1.2 GHz, each equipped with a 32KB level 1 instruction and data cache, and sharing a 1MB level 2 cache. Additionally, it includes two Cortex-R5 processors, operating at up to 500 MHz, each with a 32KB level 1 instruction and data cache and 128KB of tightly coupled memory. This multi-core ARM architecture provides significant processing power for running operating systems, complex algorithms, and managing various peripherals.
The PL side of the chip offers a rich array of programmable logic units, DSP slices, and internal RAM, allowing users to implement custom hardware accelerators, high-speed interfaces, and specialized logic functions. This combination of PS and PL enables developers to offload computationally intensive tasks to the PL for parallel processing, while the PS handles system control and software execution.
The board supports various memory configurations. The AXU2CGA variant is equipped with two DDR4 chips, providing a total of 1GB (32-bit) of DDR4 DRAM, along with a 256Mb QSPI FLASH for non-volatile storage. The AXU2CGB variant enhances this with four DDR4 chips, totaling 2GB (64-bit) of DDR4 DRAM, an 8GB eMMC FLASH memory chip, and a 256Mb QSPI FLASH. These memory options cater to different application requirements, from basic embedded systems to more data-intensive applications.
The AXU2CGA/B board is designed with a comprehensive set of peripheral interfaces to facilitate diverse development needs.
Display Interface: It includes a MINI DP (DisplayPort) output interface, supporting video image display up to 4K x 2K resolution at 30 frames per second (30Fps). This is ideal for applications requiring high-resolution video output, such as multimedia processing, industrial control, and display systems. The DisplayPort auxiliary channel is connected to the MIO pin of the PS, and the TX signals of LANE0 and LANE1 of the ZU2CG PS MGT are connected to the DP connector in a differential signal mode.
USB Connectivity: The board features four USB 3.0 interfaces, operating in HOST mode (Type A), capable of data transmission speeds up to 5.0 Gb/s. These interfaces connect to an external USB PHY chip and a USB 3.0 HUB chip via a ULPI interface, enabling high-speed data communication with external USB devices. Additionally, a USB serial port is provided for system debugging, utilizing a Silicon Labs CP2102 USB-UART conversion chip and a MINI USB interface. This allows for independent power supply of the core board and serial data communication with a PC.
Network Interface: A Gigabit Ethernet interface is available, connected to BANK502 of the PS through a GPHY chip (KSZ9031RNXIC Ethernet PHY chip from Micrel). This provides reliable high-speed network connectivity for applications requiring data transfer over Ethernet.
Storage Options: Beyond the integrated QSPI FLASH and eMMC (on AXU2CGB), the board includes a Micro SD card slot interface, connected to the IO signal of BANK501. This allows for expandable storage options, useful for booting operating systems, storing large datasets, or providing additional file system capabilities.
Expansion Capabilities: Two 40-pin expansion headers (J12 and J15) are reserved, providing 34 IOs, 1-channel 5V power supply, 2-channel 3.3V power supply, and 3-channel ground. These headers are compatible with ALINX modules or custom external circuits, offering significant flexibility for extending the board's functionality. It is important to note that the IOs should not be directly connected to 5V devices without a level conversion chip to prevent damage to the FPGA. The IO ports of the J15 expansion port are connected to BANK25 and BANK26 of the ZYNQ chip, with a 3.3V level standard.
PCIe Interface: A PCIe x1 slot is available for connecting PCIe peripherals, supporting communication speeds up to 5 Gbps. The PCIe signal is directly connected to LANE0 of the BANK505 PS MGT transceiver, enabling high-speed expansion with PCIe-compatible devices.
Camera Interfaces: The board provides two MIPI interfaces for connecting MIPI cameras. The differential signals of MIPI are connected to the HP IO of BANK64 and 65, operating at a +1.2V level standard, while the control signals are connected to BANK24, operating at a +3.3V level standard. This makes the board suitable for vision-based applications, including image processing, surveillance, and robotics.
Debug and Configuration: A 10-pin JTAG debug port is included for downloading ZYNQ UltraScale+ programs or firmware to FLASH. A 4-digit DIP switch (SW1) allows users to configure the ZYNQ system's startup mode, supporting PS JTAG, QSPI FLASH, eMMC, and SD2.0 card startup modes.
User Interaction: Four user indicator LEDs and four user control KEYs are connected to the IO of BANK24, providing basic input/output for debugging and user interaction. A reset KEY is also available.
System Clocking: The board provides essential reference clocks for the RTC (Real-Time Clock) circuit, the PS system (33.3333 MHz), and the PL end (25 MHz), ensuring stable and synchronized operation of all components.
Fan Interface: An ALINX customized fan interface is provided, powered by 12V, with speed adjustment possible via the FAN_PWM signal. This is crucial for thermal management, especially in high-performance applications.
While the manual primarily focuses on the functional aspects and usage, some elements touch upon maintenance considerations:
General| FPGA | Yes |
|---|---|
| Memory Slots | 1 |
| Max Memory | 4GB |
| QSPI Flash | 32MB |
| HDMI Output | 1 |
| Power Supply | 12V DC |
| Crystal Oscillator | 33.333 MHz |
| Processor Support | Zynq UltraScale+ MPSoC |
| Storage Interface | MicroSD |
| USB | USB 2.0 |
| Ethernet | Gigabit Ethernet |
| FPGA Part Number | XCZU2CG |
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