AT90S4414/8515
72
Chip Erase
The Chip Erase command will erase the Flash and EEPROM memories, and the Lock bits. The Lock bits are not reset until
the Flash and EEPROM have been completely erased. The Fuse bits are not changed. Chip Erase must be performed
before the Flash or EEPROM is reprogrammed.
Load Command “Chip Erase”
1. Set XA1, XA0 to “10”. This enables command loading.
2. Set BS to “0”.
3. Set DATA to ‘1000 0000’. This is the command for Chip erase.
4. Give XTAL1 a positive pulse. This loads the command.
5. Give WR
a t
WLWH_CE
wide negative pulse to execute Chip Erase. See Table 31 for t
WLWH_CE
value. Chip Erase does not
generate any activity on the RDY/BSY
pin.
Programming the Flash
A: Load Command “Write Flash”
1. Set XA1, XA0 to ‘10’. This enables command loading.
2. Set BS to ‘0’
3. Set DATA to ‘0001 0000’. This is the command for Write Flash.
4. Give XTAL1 a positive pulse. This loads the command.
B: Load Address High Byte
1. Set XA1, XA0 to “00”. This enables address loading.
2. Set BS to “1”. This selects high byte.
3. Set DATA = Address high byte ($00 - $07/$0F)
4. Give XTAL1 a positive pulse. This loads the address high byte.
C: Load Address Low Byte
1. Set XA1, XA0 to “00”. This enables address loading.
2. Set BS to “0”. This selects low byte.
3. Set DATA = Address low byte ($00 - $FF)
4. Give XTAL1 a positive pulse. This loads the address low byte.
D: Load Data Low Byte
1. Set XA1, XA0 to “01”. This enables data loading.
2. Set DATA = Data low byte ($00 - $FF)
3. Give XTAL1 a positive pulse. This loads the data low byte.
E: Write Data Low Byte
1. Set BS to “0”. This selects low data.
2. Give WR
a negative pulse. This starts programming of the data byte. RDY/BSY goes low.
3. Wait until RDY/BSY
goes high to program the next byte.
(See Figure 61 for signal waveforms.)
F: Load Data High Byte
1. Set XA1, XA0 to “01”. This enables data loading.
2. Set DATA = Data high byte ($00 - $FF)
3. Give XTAL1 a positive pulse. This loads the data high byte.
G: Write Data High Byte
1. Set BS to “1”. This selects high data.
2. Give WR
a negative pulse. This starts programming of the data byte. RDY/BSY goes low.
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