1.9 Technical Data 41
39 GND Ground
40 PCIe_RX0_N PCIe Receiver (differential)
41 PCIe_PERST←-
_N
Reset
42 GND Ground
43 GND Ground
44 GND Ground
45 GND Ground
46 GND Ground
47 PCIe_TX2_P PCIe Transmitter (differential)
48 PCIe_RX2_P PCIe Receiver (differential)
49 PCIe_TX2_N PCIe Transmitter (differential)
50 PCIe_RX2_N PCIe Receiver (differential)
51 GND Ground
52 GND Ground
53 PCIe_TX3_P PCIe Transmitter (differential)
54 PCIe_RX1_P PCIe Receiver (differential)
55 PCIe_TX3_N PCIe Transmitter (differential)
56 PCIe_RX1_N PCIe Receiver (differential)
57 GND Ground
58 GND Ground
59 GND Ground
60 GND Ground
61 DigOut0 Digital output (with level shifter)
Voltage reference VCC_IO
62 - Do not connect, internal use
63 DigOut1 Digital output (with level shifter)
Voltage reference VCC_IO
64 - Do not connect, internal use
65 DigOut2 Digital output (with level shifter)
Voltage reference VCC_IO
66 VCC_IN Input Voltage (5V-12V)
67 DigOut3 Digital output (with level shifter)
Voltage reference VCC_IO
68 VCC_IN Input Voltage (5V-12V)
69 VCC_IO Voltage reference for digital inputs / outputs.
70 VCC_IN Input Voltage (5V-12V)
Note
Additional shield pins are connected to GND.
MATRIX VISION GmbH
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