IPC@CHIP - SC12
Hardware Manual v1.1 [05.11.2002]
©BECK IPC GmbH page 4 of 28
The IPC@CHIP family microcontrollers also integrates the functions of the CPU, multiplexed
address bus, three timers, watchdog timer, chip selects, interrupt controller, two DMA controllers, two
asynchronous serial ports, and programmable I/O (PIO) pins on one chip.
The @CHIP SC12 microcontroller is a highly integrated design that provides all Media Access Control
(MAC) and Encode-Decode (ENDEC) functions in accordance with the IEEE 802.3 standard. Network
interfaces including 10Base-T via the Twisted-pair. The integrated 10Base-T transceiver makes
@Chip SC12 more cost-effective.
Compared to the 80C186/188 microcontrollers, the IPC@CHIP family microcontrollers
enables designers to reduce the size, power consumption, and cost of embedded systems, while
increasing reliability, functionality, and performance.
The IPC@CHIP family microcontrollers has been designed to meet the most common requirements
of embedded products developed for the communications, office automation, mass storage, and
general embedded markets. Specific applications including industrial controls, data collection, protocol
conversion, process monitoring and internet connectivity.
IPC@CHIP family microcontroller block diagram
DRAM
256Kx16
CPU
80186
80188
Ethernet
PHY
Flash
512Kx8
DMA
UAR
To Next Page
Loading...
Need help?
General
