%
%
38
&" #"! !$! #
(98/12/10)
can work in big or little endian mode
supports byte, word and longword accesses
supports DMA bursts of up to 32 longwords
The DEC 21140A Fast Ethernet LAN Controller is mapped into I/O
address space.
Configuration Register Device Codes
Address
DestiĆ
nation
Description
Read/
Write
Byte Format
3210
Reset ConĆ
tent
1F080000 CFID Identification R bbbb 00091011
1F080004 CFCS Command and Status R/W bbbb 02800000
1F080008 CFRV Revision R bbbb 02000011
1F08000C CFLT Latency timer R/W bbbb 00000000
1F080010 CBIO Base I/O address R/W bbbb undefined
1F080014 CBMA Base memory address R/W bbbb undefined
1F080018 -- Reserved R/W bbbb
1F080038 -- Reserved R/W bbbb
1F08003C CFIT Interrupt R/W bbbb undefined
1F080040 CFDA Driver area R/W bbbb undefined
Control and Status Register Device Codes
The CSRs registers are accessibly only after loading a I/O base address (0x1F090000)
into CBIO register and by setting I/O space access bit in CFCS register.
Notes
W: writing is only effective under suspended state
Address
DestiĆ
nation
Description
Read/
Write
Byte ForĆ
mat
3210
Reset ConĆ
tent
1F090000 CSR0 Bus Mode R/W* bbbb FF800000
1F090008 CSR1 Transmit poll demand R/W* bbbb FFFFFFFF
1F090010 CSR2 Receive poll demand R/W* bbbb FFFFFFFF
1F090018 CSR3 Receive list base address R/W* bbbb unpre-
dictable
1F090020 CSR4 Transmit list base adĆ
dress
R/W bbbb unpre-
dictable
1F090028 CSR5 Status R/W bbbb FC000000
1F090030 CSR6 Operation mode R/W* bbbb 32000040
1F090038 CSR7 Interrupt enable R/W bbbb FFFE0000
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