The 4.8GFLOPS DPS engine used for each channel performs several tasks, including synchronous up-sampling (to 705.6/768 kHz),
DSD to PCM conversion (for DSD layer playback of SACDs), volume control, resolution enhancement and linearity enhancement
(proprietary scrambling algorithm).
1.1.3 D/A conversion stage
The digital to analog conversion stage of each channel is handled by four Burr-Brown PCM 1704 R2R chips.
While total harmonic distortion (THD) figure of top R2R conversion chips (such as PCM 1704 used in C1) is slightly less impressive
than those of Delta-Sigma technology based converters, their temporal behavior (on transient events which music is filled with) is
inherently better. The high frequency behavior (above 20 kHz) is also much more accurate and free from modulation noise that
often disrupts treble speakers (tweeters), as high energy content into the 20 kHz -100 kHz band can not be handled properly by
most tweeters.
Combining four PCM 1704 the way it is done in the C1 enables improved THD figures compared to individual conversion chips and
to exploit their full output range (scrambling) which leads to an enhanced linearity, especially for small signal modulation (which is
common in the C1, especially when used as a preamplifier with volume control).
In order to achieve reproductive audio performances through our production, each chip used for a single channel should be
identical, including gain and offset. Unfortunately, tolerances on these parameter is rather loose. In order to avoid costly manual
component measurement and matching (or disparity of the audio performance of a production batch), we have introduced a fully
automated calibration process that is factory-performed, and can also be run by customer to keep top performances over time.
During this calibration process, the DSP sets several codes to each individual DAC chip, while a dedicated analog to digital converter
(ADC) measures the resulting voltage. The DSP is then able to compensate for any disparity across DAC chips on a DAC board.
1.1.4 Output stage
Each PCM 1704 chip outputs an analog current which reflects the digital code fed to the C1.
It is first converted by an ultra-fast current to voltage stage (I-V). The bandwidth of this stage has to be very wide, in order not to
distort (i.e. add harmonic distortion) the staircase shape of the sample-and-hold DAC chip output.
A fully discrete low-pass filter without feedback comes next, to smooth out the voltage signal without generating in-band phase
shift.
Finally, a differential output stage with high output current capability follows, driving single-ended 75 Ohm WBT nextgen RCA,
single-ended 50 Ohm BNC and fully-balanced Neutrik XLR connectors.
1.1.5 Volume control capability
The C1 can be used as a pure DAC (digital to analog converter) together with an analog preamplifier. But it can also be used as a
controller, directly feeding power amplifiers. In that case, it allows volume control in the range of -95.5 dB to +24.0 dB (with
0.5dB steps), with full muting capability when volume is turned lower than -95.5 dB. Positive gain (+0.5 dB to +24.0 dB) is only
possible when the incoming signal is lower than 0 dBFS (full scale). Otherwise, the C1 will automatically decrease the volume in
order to avoid any clipping. Left/right balance correction is also available in a +/- 6dB range (with 0.5dB steps).
10 C1 User Manual Rev 1.9
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