Clevo N650DU Series - Vcore, Vccgt

Schematic Diagrams
B - 34 VCORE, VCCGT
B.Schematic Diagrams
VCORE, VCCGT
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
A A
B B
C C
D D
PUT CLOSE
TO PWM
VCORE
IMAX SET
AT 66A
PUT CLOSE
TO VCORE
HOT SPOT
VCORE VBOOT
SET AT 0V,
SVID
ADDRESS=00h
6X6 52PIN QFN
BOTTOM PAD
CONNECT TO
GND Through
5 VIAs
Work F=
330kHz
,QWHO6.</$.(,09332:(59&25(3+$6(
3+2
CONFIGURATION
PUT COLSE
TO VCCGT
HOT SPOT
VCCGT VBOOT
SET AT 0V,
SVID
ADDRESS=01h
VCCGT
IMAX SET
AT 46A
105 degree C
O.C.P 80A
O.C.P 56A
Droop 2.1 mV/A
Droop 3.1 mV/A
DEFAULT
PSYS 䚉慷性攳⸚㒦㸸炻㚫忈ㆸ䲣䴙ᶵ䨑
VCCST_VCCPLLVIN5V
VCCCORE
VCCGT
VCCST_VCCPLL
3.3VS 3.3VS
5V
5V
H_VIDSCK_VR 3
PWM2 34
PWM1 34
CSN2 34
CSN1 34
VR_READY_VCORE35
H_VIDALERT_N_VR 3
H_VIDSOUT_VR 3
DRVON 34,35
CSP234
CSP134
H_PROCHOT_N3,39
VCCIO_PWRGD15,35,36
CSP1A35
PWM1A 35
CSN1A 35
VCCCORE_SENSE6
VSSCORE_SENSE6
VCCGT_SENSE7
VSSGT_SENSE7
5V24,26,32,34,35,36,37
VIN12,25,32,34,35,36,37,38,39
VCCCORE6,34
VCCST_VCCPLL3,6,16,36
3.3VS5,9,10,11,12,13,14,15,16,17,18,20,21,22,24,25,26,27,28,29,30,31,32,35,36
VCCGT7,35
PSYS39
3.3V2,12,14,15,16,18,21,22,23,24,25,26,27,32,36,37
Title
Size Document Number Rev
Date: Sheet
of
6-71-N6500-D03
2.0
[33] VCORE/VCCGT
A3
33 44Thursday, March 24, 2016
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
6-7P-N6505-005
Title
Size Document Number Rev
Date: Sheet
of
6-71-N6500-D03
2.0
[33] VCORE/VCCGT
A3
33 44Thursday, March 24, 2016
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
6-7P-N6505-005
Title
Size Document Number Rev
Date: Sheet
of
6-71-N6500-D03
2.0
[33] VCORE/VCCGT
A3
33 44Thursday, March 24, 2016
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
6-7P-N6505-005
PR11
63.4K_1%_04
PR57 1K_1%_04
PC21 1000p_50V_X7R_04
PR40 36K_1%_04
PR185
2.2_06
PR93
100_04
PR49 36K_1%_04
PR39
16.9K_1%_04
PJ39
*CV-40mil
1 2
PR23 *100K_1%_04
PR173
15.8K_1%_04
PC8 0.022u_25V_X7R_04
PR7 *100K_1%_04
PC35
4700p_50V_X7R_04
PR92
100_04
PR67 100_04
PR83 0_04
PR3 10_04
PR19 10_04
PR10 10_04
PR86
9.31K_1%_04
PR76
45.3_1%_04
PR9 7.5K_1%_04
PC41
4700p_50V_X7R_04
PR37 2K_1%_04
PC31 470p_50V_X7R_04
PR71 0_04
PR182
10K_1%_04
PC37
*0.1u_10V_X7R_04
PR81
10K_04
PR64 10_04
PC40
470p_50V_X7R_04
PC43
1000p_50V_X7R_04
PR58 4.02K_1%_04
PC22 *220p_50V_X7R_04
PC27 *220p_50V_X7R_04
PC34 470p_50V_X7R_04
PC117
470p_50V_X7R_04
PR42 150K_1%_04
PR54 4.02K_1%_04
PR30 51K_1%_06
PR183
21K_1%_04
PR82 0_04
NTC4
100k_1%_04_NTC
1 2
PR12
4.12K_1%_04
PR66 49.9_1%_04
PC28 1000p_50V_X7R_04
PC14 0.022u_25V_X7R_04
PR73 1K_1%_04
PR187
10K_1%_04
PC32
1000p_50V_X7R_04
PR77 0_04
PR35 2K_1%_04
PC118
4.7u_6.3V_X5R_06
PR24 7.5K_1%_04
PR197
*45_04
PC12 0.022u_25V_X7R_04
PR14 20K_1%_04
PC10 1000p_50V_X7R_04
PJ42
*CV-40mil
1 2
PC30 2200p_50V_X7R_04
PC39
0.1u_10V_X7R_04
PR78
1K_1%_04
PC26 2200p_50V_X7R_04
PR1
9.31K_1%_04
PC6
0.1u_10V_X7R_04
PR80
1K_1%_04
PJ40
*OPEN_4mil
12
PR188
20K_1%_04
PR45 150K_1%_04
PR74
24.3K_1%_04
PR94
100_04
PR50
20.5K_1%_04
PC7 *47p_50V_NPO_04
PC38
0.01u_50V_X7R_04
PR13
36K_1%_04
PR17 *100K_1%_04
NTC3
100k_1%_04_NTC
1 2
PC124
1u_6.3V_X5R_04
PR95
100_04
PR65 0_04
PR61 1K_1%_04
PR8 75K_1%_06
PC25 47p_50V_NPO_04
PR2 *0_04
NTC1
100k_1%_04_NTC
12
PR178
10K_1%_04
PR75
100_04
PR70 0_04
PR79
4.12K_1%_04
PR69 47.5_1%_04
NTC2
100k_1%_04_NTC
12
PR56 47.5_1%_04
PJ41
*OPEN_4mil
12
VCORE PORTION
VCCGT PORTION
PU1
NCP81203PMNTXG
CSP2
41
ROSC
8
VCC
7
FB
49
VRDY
6
SDIO
3
SCLK
5
COMP
48
VSP
51
PWM2
33
PWM1
34
CSP1
39
DIFF
50
VSN
52
TSENSE
37
CSP3
43
PWM3
32
CSP1A
25
PWM1A/ICCMAXA
30
CSN3
42
CSN1
38
CSN2
40
CSN1A
26
ALERT#
4
VRHOT
12
IOUT
1
IOUTA
13
DRVON
35
EPAD
53
VRMP
9
EN
2
VSPA
15
DIFFA
16
VSNA
14
COMPA
18
FBA
17
CSSUM
45
CSCOMP
47
ILIM
46
CSREF
44
CSSUMA
21
CSCOMPA
19
ILIMA
20
VBOOTA/ADDRA
27
TSENSEA
11
CSREFA
22
CSN2A
24
CSP2A
23
PWM2A
31
PH/FDm/FDa/SR/DDR
10
VBOOT/ADDR
28
PSYS
29
ICCMAX
36
PR21 7.5K_1%_04
PR26 75K_1%_06
PR189
24.3K_1%_04
PC29 47p_50V_NPO_04
PR53 1K_1%_04
PJ43
*OPEN_4mil
12
PR85
10K_04
PC19 1000p_50V_X7R_04
CSP1
CSP2
IMAX
PROG
VBOOT/ADDR
CSN1
CSN2
VBOOTA/ADDRA
CSN1
PROG
VBOOT/ADDR
IMAX
CSN2
CSP1
CSP2
VR_READY_NCP81203
VR_ENABLE_NCP81203
CSP1A
CSN1A
CSP1A
CSN1A
VBOOTA/ADDRA
PWM1A
Sheet 33 of 44
VCORE, VCCGT