Compaq Deskpro 4000 - Table of Contents

Technical Reference Guide
Compaq Deskpro 4000 and 6000 Personal Computers
featuring the Pentium II Processor
First Edition – October1997
iii
TABLE OF CONTENTS
CHAPTER 1 INTRODUCTION.............................................................................................................
1.1 ABOUT THIS GUIDE ........................................................................................................... 1-1
1.1.1 USING THIS GUIDE.....................................................................................................1-1
1.1.2 ADDITIONAL INFORMATION SOURCES.................................................................. 1-1
1.2 NOTATIONAL CONVENTIONS.......................................................................................... 1-2
1.2.1 VALUES........................................................................................................................1-2
1.2.2 RANGES........................................................................................................................ 1-2
1.2.3 SIGNAL LABELS..........................................................................................................1-2
1.2.4 REGISTER NOTATION AND USAGE ......................................................................... 1-2
1.2.5 BIT NOTATION............................................................................................................1-2
1.3 COMMON ACRONYMS AND ABBREVIATIONS..............................................................1-3
CHAPTER 2 SYSTEM OVERVIEW.....................................................................................................
2.1 INTRODUCTION.................................................................................................................. 2-1
2.2 FEATURES...........................................................................................................................2-2
2.2.1 STANDARD FEATURES.............................................................................................. 2-2
2.2.2 SERIES DIFFERENCES................................................................................................ 2-3
2.2.3 OPTIONS.......................................................................................................................2-3
2.3 MECHANICAL DESIGN...................................................................................................... 2-4
2.3.1 CABINET LAYOUTS....................................................................................................2-4
2.3.2 CHASSIS LAYOUTS..................................................................................................... 2-6
2.3.3 SYSTEM BOARD LAYOUTS....................................................................................... 2-7
2.4 SYSTEM ARCHITECTURE..................................................................................................2-8
2.4.1 PENTIUM II PROCESSOR.......................................................................................... 2-10
2.4.2 MEMORY.................................................................................................................... 2-10
2.4.3 SUPPORT CHIPSET.................................................................................................... 2-11
2.4.4 NETWORK INTERFACE............................................................................................ 2-11
2.4.5 GRAPHICS SUBSYSTEM........................................................................................... 2-12
2.4.6 MASS STORAGE........................................................................................................ 2-12
2.4.7 SERIAL AND PARALLEL INTERFACES .................................................................. 2-12
2.4.8 UNIVERSAL SERIAL BUS INTERFACE................................................................... 2-13
2.5 SPECIFICATIONS.............................................................................................................. 2-14
CHAPTER 3 PROCESSOR/MEMORY SUBSYSTEM........................................................................
3.1 INTRODUCTION.................................................................................................................. 3-1
3.2 PENTIUM II-BASED PROCESSOR/MEMORY SUBSYSTEM ...........................................3-2
3.2.1 PENTIUM II PROCESSOR............................................................................................ 3-3
3.2.2 SYSTEM MEMORY......................................................................................................3-6
3.2.3 SUBSYSTEM CONFIGURATION............................................................................... 3-10