Datron 1061 - Test; Analog Output; General; Description

3.6.4
Test
.-When
TEST
is
selected,
the
ratio
option
is
checked
to
see
if
it
¡s
fitted,
uv
int
-r-ró.iing
il.,u
AD4
line
to
see
if
it
is
held
high.
3.7
ANALoc
ouTpuT
(circuit
Drawing
No.430308)
3.7.1
General
The
Analog
Output
Board accepts
the
DC
lsolator
or
AC
Converter
Output
and
converts
it to
a
Jl
volt
DC
full
range
output.
This
signal
can
then
be
used,
for
example,
to
drive
X-Y
plotters
or
strip
chart recorders.
3.7.2
Description
The 3.16V
full
range
signal
from
the
DC
lsolator
or
AC Converter
is
buffered
by unity
gain
amplifier
M2.
The
output is
potentially
divided
by R7
and
RB
so
that
1
volt
full range is
presented
to M1, another
unity
gain
amplifier.
Potentiometer
R5 is
adjusted
to remove
any
offset
caused
by M1 and
M2.
Positive
temperature coefficient
thermis-
tors R3, R4
and
diodes D1
,D2,
protect
the
Analog
Output
circuitry
from accidental
input
applied
to
the
Analog
Ougut
external
connector.
3.8 DIGITAL
ASSEMBLY
(Circuit
Drawing
No.430329)
The Digital
assembly contains the
circuitry
providing
the
general
management
of the
instrument
and the
digital
section of
the A-D
converter. Fig. 3.33 outlines
the main
portions
and signal
highways of this
board.
3.9.1
processor
and
Memory
(430329
sheet
l
)
A 6900
microprocessor
(MpU)
together
wirh
l6k
bytes of memory
controls
the
commun¡cai¡on
between
the
front
panel,
digital
interface,
display
drivers, Digital
and
analog assemblies.
The
memory
can
be split
into
five
main
areas:-
-l
(11
Program
Memory
needed
to operate
the
whole
instrument
system.
33
(2)
Constant
Data
Memory
(31
Non-volatile
Calibration
Memory
(41
Operating
Memory
(5)
Volatile
Display
Memory
e.g.
Self
Test
limits'
Error
read-out
sPecif
ic'
ations
and
other
fixed
factors.
used
to store
all
the
calibration
errors
used
for
each
reading
and
determined
during
the
'Auto-cal'
cycle.
used
for
scratch
Pad
operations
and
storing.
volatile data
such
as
Max-Min stores,
Limit
stores and
computation
store s.
DATA
LATCHES
ANALOG
INTERFACE
DIGITAL
SECTION
OF
A-D
r/o
BUFFER
KS
MPU
POWER
UP/
DOWN
MEMORY
FIG.3.33
SIMPLIFIED
BLOCK
DIAGRAM
OF
DIGITAL
ASSEMBLY
DISPLAY
DIGITAL
DRIVER
INTERFACE
ASSY.
ASSY.
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