2 Analog Output Module DVP02DA-E2/DVP04DA-E2
Note: Default setting = H0. Whe
n set value = H’5678, saving will be enabled, and CR#41 will be set to
H’FFFF when saving is completed. If the set value is not H’5678, the set value will remain H’0. For
example, input K1 into CR#41, and the value will remain H’0.
CR#42: Function: Return to default setting. Default =H’0000
[Explanation]
Description
bit0 b0=0, no action on CH1; b0=1, set CH1 to default setting
bit1 b1=0, no action on CH2; b1=1, set CH2 to default setting
bit2 b2=0, no action on CH3; b2=1, set CH3 to default setting
bit3 b3=0, no action on CH4; b3=1, set CH4 to default setting
bit4 ~ bit15 Reserved
Note: Set designated bit as 1 and the corresponding channel will be Return to default setting. When
setting is completed, the value will be set to 0. If CR#40(Set value changing prohibited) is enabled, the
default setting in CR#42 will be invalid, and all set values will remain unchanged. Error Code bit 12 of
CR#43 will be set to 1.
Relative Parameters
CR#2 ~ CR#5 Output mode setting of CH1 ~ CH4
CR#28 ~ CR#31 Adjusted Offset value of CH1 ~ CH4
CR#34 ~ CR#37 Adjusted Gain value of CH1 ~ CH4
CR#100 Function: Enable/Disable limit detection
CR#102~CR#105 Set value of CH1~CH4 upper bound
CR#108~CR#111 Set value of CH1~CH4 lower bound
CR#114~CR#117 Output update time of CH1 ~ CH4
CR#118 LV output mode setting
CR#43: Error Status. Default=H’0000
[Explanation]
CR#43: error status value. See the table below:
Description
bit0 K1 (H’1) Power supply error
bit1 K2 (H’2) Hardware error
bit2 K4 (H’4) Upper / lower bound error
bit3 ~ bit8 Reserved
bit9 K512(H’0200) Mode setting error
bit10 Reserved
bit11 K2048(H’0800) Upper / lower bound setting error
bit12 K4096(H’1000) Set value changing prohibited
Bit13 K8192(H’2000) Communication breakdown on next module
bit14 ~ bit15 Reserved
Note: Each error status is determined by the corresponding bit (b0 ~ b13) and there may be more
than 2 errors occurring at the same time. 0 = normal; 1 = error
CR#100: Function: Enable/Disable limit detection
[Explanation]
Description
bit0=1 Enable CH1 limit detection
bit1=1 Enable CH2 limit detection
bit2=1 Enable CH3 limit detection
bit3=1 Enable CH4 limit detection
bit4 ~ bit7
Reserved
bit8=1 Enable upper/lower bound limitation function on CH1
bit9=1 Enable upper/lower bound limitation function on CH2
bit10=1 Enable upper/lower bound limitation function on CH3
bit11=1 Enable upper/lower bound limitation function on CH4
bit12 ~ bit15 Reserved
DVP-ES2 Module Manual
2-6