GRAPHTEC CE5000-120 - Main Board CPU Section (PN0021-01)

CE5000-UM-251-9370 11-13
11 BLOCK DIAGRAMS AND CIRCUIT DIAGRAMS
11.2.12 Main Board CPU Section (PN0021-01)
1
1
D[1]
D[7]
D[11]
D[9]
D[6]
D[14]
D[2]
D[5]
D[10]
D[8]
D[13]
D[3]
D[0]
D[4]
D[15]
D[12]
D[13] D[15]
D[3] D[7]
D[10] D[12]
D[0] D[4] D[1] D[8]
D[11] D[14]
D[2] D[5] D[6] D[9] A[0] A[1] A[2] A[3] A[4] A[5] A[6] A[7] A[8] A[9]
A[10] A[11]
A[12] A[13] A[14] A[15] A[16]
A[17] A[18] A[19] A[20] A[21]
A[0]
A[1]
A[2]
A[3]
A[4]
A[5]
A[6]
A[7]
A[8]
A[9]
A[10]
A[11]
A[12]
A[13]
A[14]
A[15]
A[16]
A[17]
A[18]
A[19]
A[20]
A[21]
DIP[0]
DIP[1] DIP[2] DIP[3]
LCDB[7]
LCDB[6] LCDB[1]
LCDB[0]
LCDB[5] LCDB[2] LCDB[3] LCDB[4]
DIP[1]
DIP[0] DIP[3]
DIP[2]
RA31
4.7K
1
2
3
45
6
7
8
+3.3V
+3.3V
+1.8V_OUT
R18
1K
1608
C13 0.1u
1608 C12 0.1u 1608
DG
DG DG
RA123
4.7K
1
2
3
4 5
6
7
8
RA124
4.7K
1
2
3
4 5
6
7
8
C110 0.1u
1608
C111 0.1u
1608
C112 0.1u
1608
C3 0.1u
1608
C4
0.1u
1608
C6 0.1u
1608
C7
0.1u
1608
C8
0.1u
1608
C9
0.1u
1608
C119 0.1u
1608
C120 0.1u
1608
C121 0.1u
1608
C122 0.1u
1608
C123 0.1u
1608
C124 0.1u
1608
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+1.8V_OUT
+1.8V_OUT
+1.8V_OUT
+1.8V_OUT
+1.8V_OUT
DG DG DG DG DG DG DG DG DG DG
DG DG DG DG DG
C129
0.1u
1608
+3.3V
DG
RA103 1K
1
2
3
4 5
6
7
8
RA104 1K
1
2
3
4 5
6
7
8
RA105 1K
1
2
3
4 5
6
7
8
RA102 1K
1
2
3
4 5
6
7
8
+3.3V
RA111 1K
1
2
3
4 5
6
7
8
+3.3V
RA112 1K
1
2
3
4 5
6
7
8
RA113 1K
1
2
3
4 5
6
7
8
RA114 1K
1
2
3
4 5
6
7
8
RA110 1K
1
2
3
4 5
6
7
8
DG
+3.3V
C11
33p
1608
C10
33p
1608
C138 0.1u
1608
DG
C137 0.1u
1608
+1.8V_OUT+1.8V_OUT
C139 470p
1608
C140 470p
1608
U5
HD6417709SF133BV
ADTRG/PTH[5]
125
AN[0]/PTL[0]
199
AN[1]/PTL[1]
200
AN[2]/PTL[2]
201
AN[3]/PTL[3]
202
AN[4]/PTL[4]
203
AN[5]/PTL[5]
204
AN[6]/DA[1]/PTL[6]
206
AN[7]/DA[0]/PTL[7]
207
ASEMD0/PTG[6]
127
AUDCK/PTH[6]
151
BREQ
122
CA
194
CTS2/IRQ5/SCPT[7]
176
DREQ0/PTD[4]
191
DREQ1/PTD[6]
192
EXTAL
156
EXTAL2
5
IOIS16/PTG[7]
126
IRLS0/PTF[0]/PINT[8]
143
IRLS1/PTF[1]/PINT[9]
142
IRLS2/PTF[2]/PINT[10]
141
IRLS3/PTF[3]/PINT[11]
140
IRQ0/IRL0/PTH[0]
8
IRQ1/IRL1/PTH[1]
9
IRQ2/IRL2/PTH[2]
10
IRQ3/IRL3/PTH[3]
11
IRQ4/PTH[4]
12
MD0
144
MD1
1
MD2
2
MD3
195
MD4
196
MD5
197
NMI
7
RESETM
124
RESETP
193
RXD0/SCPT[0]
171
RXD1/SCPT[2]
172
RXD2/SCPT[4]
174
TCK/PTF[4]/PINT[12]
139
TDI/PTF[5]/PINT[13]
138
TMS/PTF[6]/PINT[14]
137
TRST/PTF[7]/PINT[15]
136
WAIT
123
ASEBRKAK/PTG[5]
128
AUDATA[0]/PTG[0]
135
AUDATA[1]/PTG[1]
133
AUDATA[2]/PTG[2]
131
AUDATA[3]/PTG[3]
130
AUDSYNC/PTE[7]
94
BS/PTK[4]
87
CAP1
146
CAP2
149
CASL/PTJ[2]
108
CASU/PTJ[3]
110
CE2A/PTE[4]
103
CE2B/PTE[5]
104
CKE/PTK[5]
105
CKIO
162
CS2/PTK[0]
98
CS3/PTK[1]
99
CS4/PTK[2]
100
CS5/CE1A/PTK[3]
101
DACK0/PTD[5]
114
DACK1/PTD[7]
115
DRAK0/PTD[1]
189
DRAK1/PTD[0]
190
MCS[0]/PTC[0]/PINT[0]
188
MCS[1]/PTC[1]/PINT[1]
187
MCS[2]/PTC[2]/PINT[2]
186
MCS[3]/PTC[3]/PINT[3]
185
MCS[4]/PTC[4]/PINT[4]
180
MCS[5]/PTC[5]/PINT[5]
179
MCS[6]/PTC[6]/PINT[6]
178
MCS[7]/PTC[7]/PINT[7]
177
PTE[1]
119
PTE[3]
117
PTE[6]
116
PTG[4]/CKIO2
129
PTJ[1]
107
PTJ[4]
112
PTJ[5]
113
RAS3L/PTJ[0]
106
RAS3U/PTE[2]
118
RESETOUT/PTD[2]
184
RTS2/SCPT[6]
170
SCK0/SCPT[1]
165
SCK1/SCPT[3]
167
SCK2/SCPT[5]
169
STATUS0/PTJ[6]
157
STATUS1/PTJ[7]
158
TCLK/PTH[7]
159
TDO/PTE[0]
120
WAKEUP/PTD[3]
182
WE2/DQMUL/ICIORD/PTK[6]
91
WE3/DQMUU/ICIOWR/PTK[7]
92
AVSS1
198
AVSS2
208
VSS-PLL1
147
VSS-PLL2
148
VSS-RTC
6
VSS1
27
VSS2
79
VSS3
132
VSS4
152
VSS5
153
VSS6
173
VSSQ1
19
VSSQ2
33
VSSQ3
45
VSSQ4
57
VSSQ5
69
VSSQ6
83
VSSQ8
161
VSSQ7
95
VSSQ9
109
VSSQ10
181
D0
52
D1
51
D2
50
D3
49
D4
48
D5
46
D6
44
D7
43
D8
42
D9
41
D10
40
D11
39
D12
38
D13
37
D14
36
D15
34
D16/PTA[0]
32
D17/PTA[1]
31
D18/PTA[2]
30
D19/PTA[3]
28
D20/PTA[4]
26
D21/PTA[5]
25
D22/PTA[6]
24
D23/PTA[7]
23
D24/PTB[0]
22
D25/PTB[1]
20
D26/PTB[2]
18
D27/PTB[3]
17
D28/PTB[4]
16
D29/PTB[5]
15
D30/PTB[6]
14
D31/PTB[7]
13
A0
53
A1
54
A2
55
A3
56
A4
58
A5
60
A6
61
A7
62
A8
63
A9
64
A10
65
A11
66
A12
67
A13
68
A14
70
A15
72
A16
73
A17
74
A18
75
A19
76
A20
77
A21
78
A22
80
A23
82
A24
84
A25
86
BACK
121
CS0/%MCS[0]
96
CS6/CE1B
102
IRQOUT
160
RD
88
RD/WR
93
TXD0/SCPT[0]
164
TXD1/SCPT[2]
166
TXD2/SCPT[4]
168
WE0/DQMLL
89
WE1/DQMLU/WE
90
XTAL
155
XTAL2
4
AVCC
205
VCC-PLL1
145
VCC-PLL2
150
VCC-RTC
3
VCC1
29
VCC2
81
VCC3
134
VCC4
154
VCC5
175
VCCQ1
21
VCCQ2
35
VCCQ3
47
VCCQ4
59
VCCQ5
71
VCCQ6
85
VCCQ7
97
VCCQ8
111
VCCQ9
163
VCCQ10
183
DG
RA151
4.7K
1
2
3
4 5
6
7
8
+3.3V
RA30 4.7K
1
2
3
45
6
7
8
R2
1K
1608
RA169
1K
1
2
3
4 5
6
7
8
A[21-0]
RTS-DZ
FPGA_CS1
FPGA_CS0
PMDATA
FLASH_CS
PMCLK
RD/WR
PMCS
DTR-DZ
TXD0
CKE
WE0
RAS WE1
CAS
CLK
RD
RESETP
USB_CS SDRAM_CS
RXD0
DSR0Z
TOMBO
USBINT
LOCALINT
SRVINT
RY_BY
CTS0Z
RESETP
RA170
4.7K
1
2
3
4 5
6
7
8
D[15-0]
PN0021-01A CPU BLOCK
+3.3V
X1
16.0MHZ
RA125
4.7K
1
2
3
45
6
7
8
RA147
4.7K
1
2
3
45
6
7
8
DIN
CCLK
RESET
RA175
4.7K
1
2
3
4 5
6
7
8
RESETP
PROGRAM
DONE
INIT
RA176
4.7K
1
2
3
45
6
7
8
+3.3V
LCDB[0-7]
J60 A3-14PA-2SV(71)
1 2 3 4 5 6 7 8 9
10 11 12 13 14
JP3
A3-4PA-2SV(71)
1 2
3 4
DG
DG
DG
DG
DG
J61
BM04B-SRSS-TB
1 2 3 4
+3.3V
DG
C201 0.1u
1608
DG
+3.3V
EEP_CS EEP_SK EEP_DO EEP_DI
LCDB_RW
LCDB_RS
LCDBE
EEP_CS EEP_DI
RMSLED
MENULED
FPGA_RES
EEP_DO EEP_SK
FANON
RA177
4.7K
1
2
3
45
6
7
8
DREQ0 DREQ1
DREQ0
DREQ1
+3.3V
DG
DTR-DZ
DTR-DZ
+3.3V
EXTAL2_PLL
FANON_IN
VCC
FANON_OUT
EXTAL2_PLL
+1.8V_OUT
DG
RA3
4.7K
1
2
3
45
6
7
8
U116 93LC66AT-I/SN
CS
1
SK
2
DI
3
DO
4
GND
5
NC6
6
NC7
7
VCC
8
D481SS352
D471SS352
D441SS352
D431SS352
C239 1000p
1608
DG
SW1
CHS-04B1
1 2 3 4
8 7 6 5
DG
DG
+3.3V
Q2 HAT1069C
6
5 1
432
+1.8V
+1.8V_OUT
C242 0.1u
1608
R216
2M
1608
RNA50C27AUS U120
VDD33
1
GND
4
RESN
3
RESP
2
SWG
5
VDD18
6
MR
8
CRext
7
C241
220p
1608
TCK
#TRST TDO #ASEBRK TMS TDI RESETP GND
19-21
33-35
45-47
57-59
69-71
83-85
95-97
109-111
161-163
181-183
205-208
27-29
79-81
132-134
153-154
173-175
145-147
150-148
GND
GND GND
GND GND NC
+3.3V RXD TXD GND
PULLUP
D43,D44 are not installed.
J61 is not installed.
RA3 is not intalled
S D
G
10% 5%
5%