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Hitachi EH-150 - Page 87

Hitachi EH-150
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Chapter 8 Register Structure
Bit 1: Send timeout error bit (STE[6:1])
These bit the timeout condition during sending data.
Bit1: STE[6:1] Description
0 No timeout error is detected during sending data.
1 A timeout error is detected during sending data.
Method to clear: To clear these bits to "0", please set "1" to TEC[6:1] of EC1CR.
Bit 0: Open error bit (OE[6:1])
These bits show the condition during opening connection.
Bit0: OE[6:1] Description
0 No error is detected during opening connection.
1 An error is detected during opening connection.
Method to clear: To clear these bits to "0", please set "1" to OEC[6:1] of EC1CR.
8-4

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