Chapter 8 Register Structure
Error clear 3 control register (EC3CR)
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
+H8
- -
SNC6 SNC5 SNC4 SNC3 SNC2 SNC1 - - RCC6 RCC5 RCC4 RCC3 RCC2 RCC1
This register is used for to clear the bits related to connection error.
Bit 15, 14, 7 and 6: Reserved
These bits are reserved bits. Please set "0" always.
Bit 13-8: SNE[6:1]clear bit (SNC[6:1])
These bits request to clear Send timeout error bit (SNE[6:1]) in Connection n error status register (CnESR).
Bit13-8: SNC[6:1] Description
0 Nothing is done. (Initial set)
1 Request to clear SNE[6:1] bits.
Bit 5-0: RCE[6:1] clear bit (RCC[6:1])
These bits request to clear Open error bit (RCE[6:1]) in Connection n error status register.
Bit5-0: RCC[6:1] Description
0 Nothing is done. (Initial set)
1 Request to clear RCE[6:1] bits.
Close mode control register (CMCR)
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
+H9
- - - - - - - - - - CM6 CM5 CM4 CM3 CM2 CM1
This is the register which chooses the handling when this module receives Close request from other station.
Bit 15-6: Reserved.
These bits are reserved bits. Please set "0" always.
Bit 13-8: Close mode bit (CM[6:1])
To specify the close mode for each connection.
Bit5-0: CM[6:1] Description
0 The mode where this module Close connection as soon as this module
receives close request from other station.
(Initial set)
1 The mode where this module waits for close request from user program
when this module receives close request.
8-11
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