Hitachi H8S/2646 User Manual

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2.9.3 On-Chip Supporting Module Access Timing
The on-chip supporting modules are accessed in two states. The data bus is either 8 bits or 16 bits
wide, depending on the particular internal I/O register being accessed. Figure 2-19 shows the
access cycle for the on-chip supporting modules. Figure 2-20 shows the pin states.
Bus cycle
T1 T2
Address
Read data
Write data
Internal read signal
Internal data bus
Internal write signal
Internal data bus
Read 
access
Write 
access
Internal address bus
ø
Figure 2-19 On-Chip Supporting Module Access Cycle

Hitachi H8S/2646 Specifications

General

Brand	Hitachi
Model	H8S/2646
Category	Desktop
Language	English