45
2.6.2 Instructions and Addressing Modes
Table 2-2 indicates the combinations of instructions and addressing modes that the H8S/2600 CPU
can use.
Table 2-2 Combinations of Instructions and Addressing Modes
Addressing Modes
Function
Data
transfer
Arithmetic
operations
Instruction
MOV BWL BWL BWL BWL BWL BWL B BWL — BWL — — — —
POP, PUSH — — — — — — — — — — — — — WL
LDM, STM — — — — — — — — — — — — — L
ADD, CMP BWL BWL — — — — — — — — — — — —
SUB WL BWL — — — — — — — — — — — —
ADDX, SUBX B B — — — — — — — — — — — —
ADDS, SUBS — L — — — — — — — — — — — —
INC, DEC — BWL — — — — — — — — — — — —
DAA, DAS — B — — — — — — — — — — — —
NEG — BWL — — — — — — — — — — — —
EXTU, EXTS — WL — — — — — — — — — — — —
TAS
*2
 — — B — — — — — — — — — — —
MAC — — — — — — — — — — — — —
CLRMAC — — — — — — — — — — — — —
MOVFPE
*1
, — — — — — — — B — — — — — —
MOVTPE
*1
MULXU,  — BW — — — — — — — — — — — —
DIVXU
MULXS, — BW — — — — — — — — — — — —
DIVXS
LDMAC, — L — — — — — — — — — — — —
STMAC
#xx
Rn
@ERn
@(d:16,ERn)
@(d:32,ERn)
@–ERn/@ERn+
@aa:8
@aa:16
@aa:24
@aa:32
@(d:8,PC)
@(d:16,PC)
@@aa:8
—