876
MRB—DTC Mode Register B H'EBC0–H'EFBF DTC
7
CHNE
Undefined

—
6
DISEL
Undefined

—
5
—
Undefined

—
4
—
Undefined

—
3
—
Undefined

—
0
—
Undefined
—
2
—
Undefined

—
1
—
Undefined

—
Bit

Initial value
Read/Write
DTC Interrupt Select
0 After a data transfer ends, the CPU interrupt is 
disabled unless the transfer counter is 0 

1 After a data transfer ends, the CPU interrupt is 
enabled
DTC Chain Transfer Enable
0 End of DTC data transfer
1 DTC chain transfer
SAR—DTC Source Address Register H'EBC0–H'EFBF DTC
23

Unde-
fined

—
Bit

Initial value
Read/Write
22

Unde-
fined

—
21

Unde-
fined

—
20

Unde-
fined

—
19

Unde-
fined

—
4

Unde-
fined

—
3

Unde-
fined

—
2

Unde-
fined

—
1

Unde-
fined

—
0

Unde-
fined

—
- - -
- - -
- - -
- - -
Specify DTC transfer data source address
DAR—DTC Destination Address Register H'EBC0–H'EFBF DTC
23

Unde-
fined

—
Bit

Initial value
Read/Write
22

Unde-
fined

—
21

Unde-
fined

—
20

Unde-
fined

—
19

Unde-
fined

—
4

Unde-
fined

—
3

Unde-
fined

—
2

Unde-
fined

—
1

Unde-
fined

—
0

Unde-
fined
—
- - -
- - -
- - -
- - -
Specify DTC transfer data destination address