Hitachi HDS725050KLA360 - Default Chapter; Table of Contents

Table of Contents
1.0 General..............................................................................................................1
1.1 Introduction.............................................................................................1
1.2 References...............................................................................................1
1.3 Abbreviations..........................................................................................1
1.4 Caution....................................................................................................3
2.0 General features of the drive ..........................................................................5
3.0 Fixed-disk subsystem description...................................................................9
3.1 Control electronics..................................................................................9
3.2 Head disk assembly ...............................................................................9
3.3 Actuator ..................................................................................................9
4.0 Drive characteristics........................................................................................11
4.1 Default logical drive parameters.............................................................11
4.2 Data sheet................................................................................................12
4.3 World Wide Name Assignment..............................................................12
4.3.1 Drive format....................................................................................12
4.3.2 Cylinder allocation..........................................................................13
4.4 Performance characteristics....................................................................13
4.4.1 Command overhead........................................................................14
4.4.2 Mechanical positioning...................................................................15
4.4.3 Drive ready time .............................................................................16
4.4.4 Data transfer speed..........................................................................17
4.4.5 Throughput......................................................................................18
4.4.6 Operating modes.............................................................................19
5.0 Defect flagging strategy...................................................................................21
6.0 Specification .....................................................................................................23
6.1 Electrical Interface..................................................................................23
6.1.1 Connector location..........................................................................23
6.1.2 4pin DC Power connector...............................................................24
6.1.3 AT signal connector........................................................................24
6.2 Signal definitions (PATA model)...........................................................25
6.3 Signal descriptions..................................................................................26
6.4 Interface logic signal levels (PATA model) ...........................................29
6.4.1 Signal definition (SATA model).....................................................29
6.4.2 Out of band signaling (SATA model).............................................30
6.5 Signal timings (PATA model)................................................................31
6.5.1 Reset timings...................................................................................31
6.6 PIO timings.............................................................................................32
6.6.1 Write DRQ interval time.................................................................32
6.6.2 Read DRQ interval time .................................................................33
6.7 Multiword DMA timings........................................................................34
6.8 Ultra DMA timings.................................................................................35
6.8.1 Initiating Read DMA ......................................................................35