HP
5384A and
HP
5385A
Service
8-212. The HP-IB
microcomputer
(US)
receives
commands
from
the bus, interprets
them,
and sends
them
to
the
motherboard.
It
also receives measure-
ment
data
from
the
motherboard,
formats
it,
and
sends
it
out
on
the
bus when addressed
to
talk. The
bus
protocol
that
performs
these tasks
is
generated by
instructions
contained
in the
program
ROM
of
the
microcomputer.
8-213. HP-IL
8-214. Refer
to
the
HP-IL schematic diagram, Fig-
ure
8-53,
for
the discussion
of
the
HP-IL
theory
of
operation.
8-215. The HP-IL, A4 board
of
the
HP
5384A and
HP
5385A counters consists
of
transceiver pulse trans-
formers (T1), electrostatic discharge
(ESD)
protection
diodes (CR1-4),
an
HP-IL IC (U1), a
microcomputer
(U2), and a
few
other
discrete components.
8-216. The signals
from
the
loop
come
into
the
Schmitt
trigger
receiver
inputs
(RXDO
and RXD1)
of
the
HP-IL IC (U1)
through
a small pulse
transformer
which
provides a
net
voltage
step-up
and
loop
isolation.
Zener
diodes
CR1
and CR2
provide
Electro-
static Discharge
protection.
Resistors
R1
and
R3
to
ground
from
the
receiver
inputs
provide
the
proper
load
for
the
loop.
8-217. The transmitter
outputs
(TXDO
and TXD1)
send a signal
through
a simple low-pass
filter
and
impedance matching
network
consisting
of
capacitors
C2
and C3, and series resistors
R2
and
R4.
Zener
diodes
CR3
and CR4 are
for
electrostatic discharge
protection.
The signal goes
to
a pulse transformer
which
steps
down
the voltage
to
the
proper
loop
level
and provides isolation.
8-218. The HP-IL IC (U1), accepts serial data
(a
message frame)
from
the
loop,
through
the
input
buffer.
The message frame
is
gated
into
the
input
register.
Most
of
the
frame
decoding
is
done
in the
input
register.
Depending
on
the
type
of
frame, the
message frame may
be
immediately
sent
out
again
through
the
input
register
multiplexer
and
the
transmit
encoder
or,
it
could
be loaded
into
R2-R
of
the
microcomputer
on
data lines
DO
through
D7.
R2-R
is
the read
only
half
of
register
number
two
of
eight
registers contained in
the
microcomputer.
The
registers are
the
microcomputer's
main means
of
communication
with
the
data bus. The address code
is
sent
on
lines
RSO
through
RS2
of
the
microcomputer.
8-28
8-219.
The
microcomputer
(U2) communicates
with
the
main
microcomputer
in
the
counter
through
four
•
data lines
(DO
through
D3) and
three
handshake lines
(DIR, DVAL, and DREC). DIR
is
driven
only
by U2
while
the
other
are may be
driven
by
either
U2
or
the
main
microcomputer
in
the
counter.
Wheneverthere
is
a simultaneous request
for
data transfer by
both
microcomputers, the
1/0
microcomputer
U2
will
have precedence.
8-220. The handshake lines are used
to
coordinate
the
transfer
of
data between U2 and
the
main
micro-
computer
in the counter. DIR signals
the
direction
of
data
flow;
low
logic
level
for
data transmission
from
U2 to the main
microcomputer
and
logic
high
for
data
flow
from
the main
microcomputer
to
U2. The DIR
fine
is
also used
for
aborting
data transmissions
from
the main
microcomputer
to
U2
on
the A4 interface
board.
Aborting
transmission
is
accomplished by
the
interface
driving
the
DIR line
low
instead
ofthe
DREC
line
after
it
receives
the
last
nibble
of
data addressed
to
it. The DVAL
line
signals
that
data
is
valid. DVAL also
signals a request
for
data transmission
from
the
main
microcomputer
on
the
A 1 board.
8-221. Inputs
XTL
1 and
XTL2
interface
an
LC
network
to
set the internal oscillator
frequency
of
the
micro-
•
computer.
The
frequency
is
approximately
3.5
MHz.
8-222.
Pins
8
through
14
(port
4)
connect
to
switch
51
and are used
to
set the address
of
the
counter.
8-223. The
RESET
is
an active
low
input
that
is
used
to
reset the internal state
of
the
microcomputer.
8-224.
The
EXT
INT
input
is
an
external
interrupt.
The
input
is
also used
in
conjunction
with
the
timer
for
event
counting.
8-225. The
STROBE
provides a single active
low
out-
put
pulse after valid data
is
present
on
port
0 (0-0 - 0-7)
during
an
output
instruction.
8-226. The HP-IL system
uses
a three-level
code
in
which
information
is
encoded
as
a
function
of
signal
level transitions.
All
information
on
the
loop
is
sent
as
a sequence
of
eleven bits called a message frame.
See
Figure 8-40. The first
bit,
called
the
sync
bit,
is
coded
in
a special way
so
that
each device can easily recognize
the
beginning
of
a frame. The sync
bit
and
the
next
two
bits are called
control
bits and
they
determine
the
major classification
of
a message. Command
messages,
ready messages, and data messages are examples
of
•
the
major
classes.
The remaining
eight
bits, sometimes
called data bits
(not
to
be confused
with
the
data
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