Contents
1. Theory of Operation
Processor Board Description . . . . . . . 1-1
Clock Generator (U107, U110) . . . . . 1-1
Reset Circuit (U109) with Buffers (U104) 1-1
Central Processor Unit (U101) with PAL (U106),
Address Decoder (U105) and Interface Control
(U103, U104) . . . . . . . 1-1
Memories and Battery Supplies 1-2
EPROMs, . . . . . . 1-2
RAM. . . . . . . . 1-2
Battery Buffered RAM 1-2
Device-Bus Interface 1-2
HP-IB, Real Time Clock and InterfacejCIock
Selection . . . 1-3
HP-IB 1-3
Real Time Clock . . . . 1-3
InterfacejCIock Selection 1-3
Display jKeyboardjInterrupt Interface . 1-3
Interrupts . . . . . . .. .. 1-3
Keyboard Control . . . . 1-4
Display Data and Brightness 1-4
Display Voltage Supply 1-4
Power Supply
Board
1-4
Primary
regulation . . . . 1-4
Secondary regulation . . . 1-5
Overvoltage Protection and Low Voltage Detection 1-5
Display Board . . . . . . . . . . . . . . . . . 1-5
2. Functional Tests
Specifìcations ..... 2-1
Mainframe Specifìcations 2-1
Function Tests . . . . 2-2
Introduction . . . . 2-2
Equipment Required 2-2
Test Record . . . . 2-3
Test Failure . . . . 2-3
Instruments Specifìcations 2-3
IA. Function Test Using the HP 81533A . 2-3
Display Function and Module Interface Tests . 2-4
Display Function Tests . . 2-4
Module Interface Tests 2-4
ANALOG INPUT (8152A IN) 2-6
Contents-1
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