AFE1_AFE2-1:1
I-jet
17
These are the MIPI-20 pin definitions:
Pin Signal Type Description
1 VTref Input The target reference voltage. Used by I-jet to check
whether the target has power, to create the
logic-level reference for the input comparators, and
to control the output logic levels to the target. It is
normally fed from JTAG I/O voltage.
2 SWDIO/TMS I/O, output JTAG mode set input of target CPU. This pin should
be pulled up on the target. Typically connected to
TMS of the target CPU.
3 This pin is a GND pin connected to GND in I-jet. It
should also be connected to GND in the target
system.
4SWCLK/TCKOutputJTAG clock signal to target CPU. It is recommended
that this pin is pulled to a defined state of the target
board. Typically connected to TCK of the target
CPU.
5 This pin is a GND pin connected to GND in I-jet. It
should also be connected to GND in the target
system.
6 SWO/TDO Input JTAG data output from target CPU. Typically
connected to TDO of the target CPU. When using
SWD, this pin is used as Serial Wire Output (SWO)
trace port. (Optional, but not required for SWD
communication.)
-- -- -- This pin (normally pin 7) does not exist.
8 TDI Output JTAG data input of target CPU. It is recommended
that this pin is pulled to a defined state on the target
board. Typically connected to TDI of the target CPU.
For CPUs which do not provide TDI (SWD-only
devices), this pin is not used (tri-stated).
9 This pin is a GND pin connected to GND in I-jet. It
should also be connected to GND in the target
system.
10 nRESET I/O Target CPU reset signal. Typically connected to the
RESET pin of the target CPU, which is typically called
nRST, nRESET, or RESET.
Table 3: MIPI-20 pin definitions
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