PCI Card Placement Rules 291
PCI Card Placement Rules
Notes:
1. One High Speed Line is allowed per IOP. If there is a need to support more than one high
speed line, the “Configuration Validation Procedure” on page 283 should be used to
determine if enough memory and performance capacity is available on the IOP to support
more lines. The following are defined as High Speed Lines:
• Synchronous PPP above 64 Kbps to 2048 Kbps
• SDLC above 64 Kbps to 2048 Kbps
• Frame Relay above 64 Kbps to 2048 Kbps
• X.25 above 64 Kbps to 640 Kbps
Line speeds greater than 64 Kbps have the following restrictions:
#4745 PCI Two-Line WAN IOA
#9771 Base PCI Two-Line WAN
with Modem
8
X.25 up to 32 virtual circuits and
line speed up to 64 Kbps
2, 3
87
X.25 up to 64 virtual circuits and
line speed up to 64 Kbps
2, 3
11 7
X.25 up to 32 virtual circuits and
linespeedupto640Kbps
1, 2, 3
815
X.25 up to 64 virtual circuits and
linespeedupto640Kbps
1, 2, 3
12 15
X.25 up to 256 virtual circuits and
linespeedupto640Kbps
1, 2, 3
35 15
#2743 PCI 1Gbps Ethernet
IOA
7, 11
IPX Not Supported
10
--
#2744 100 Mbps PCIToken Ring
IOA
7
IPX
5
31 72
#4723 PCI 10Mbps Ethernet IOA IPX
5
31 24
#4746 PCI Twinaxial Workstation
IOA
11
Maximum Addresses and
sessions
9
--
#4838 PCI 100/10MbpsEthernet
IOA
7
IPX
5
31 72
#4815/#4816/#4818PCI
155Mbps
AT M
IOA
7, 10
Up to two emulated LANs
6
89 47
IOA Capability/Comment Memory
(per port)
Performance
(per port)