IBM NetVista Technical Information Manual

6 NetVista™ Technical Information Manual
Chip set control
A40 and A40p models use the Intel 815E chip set. The Intel 815E chip set is the
interface between the microprocessor and the following:
• Memory subsystem
•PCI buses
• IDE bus master connection
• USB ports
• System Management Bus (SMBus)
• Enhanced DMA controller
• Real-time clock (RTC)
• Ethernet
• Audio
A20 models use the Intel 810E chip set. The Intel 810E chip set is the interface
between the microprocessor and the following:
• Memory subsystem
•PCI buses
• IDE bus master connection
• USB ports
• SMBus
• Enhanced DMA controller
• Real-time clock (RTC)
• Audio
• MIDI/joystick port
• Video
Memory subsystem
The system memory interface is controlled by the Intel 815E chip set (A20 by the
810E chip set). System memory is synchronous dynamic random access memory
(SDRAM).
The maximum amount of system memory is 512 MB. For memory expansion, the
system board provides dual inline memory module (DIMM) connectors.
The system board supports PC100 and PC133 memory DIMMs (A20 supports PC133
only) in sizes of 64 MB, 128 MB, and 256 MB. The amount of preinstalled memory
varies by model.
The following information applies to system memory:
• Non-error checking and correction (non-ECC) SDRAM is supported.
• The maximum height of memory modules is 3.465 cm (1.375 in.).
• Use PC100 or PC133 DIMMs only.
• System memory is auto-detected and auto-configured using serial presence
detect.
For information on the pin assignments for the memory module connectors, see
“Memory connectors” on page 34.

IBM NetVista Specifications

General

Brand	IBM
Model	NetVista
Category	Desktop
Language	English