50 IBM Power 770 and 780 (9117-MMD, 9179-MHD) Technical Overview and Introduction
Figure 2-8 shows the physical memory DIMM topology for Power 770 and Power 780 with
four P7+ single-chip-modules (SCMs).
Figure 2-8 Physical memory DIMM topology for the Power 780 with four SCMs
For the POWER 770 and POWER 780, 16 buffered DIMM slots are available:
DIMM slots J1A to J4A are connected to the memory controller on POWER7+
processor CP0.
DIMM slots J5A to J8A are connected to the memory controller on POWER7+
processor CP2.
DIMM slots J1B to J4B are connected to the memory controller on POWER7+
processor CP3.
DIMM slots J5B to J8B are connected to the memory controller on POWER7+
processor CP1.
Unsupported: DDR2 memory (used in POWER6 processor-based systems) is not
supported in POWER7+ processor-based systems.
P3-C28
P3-C29
P3-C27
P3-C26
P3-C25
P3-C24
P3-C23
P3-C22
A
B
B
B
M0 - D SN DDR3 DIMM #16
M0 - C SN DDR3 DIMM #15
M0 - B SN DDR3 DIMM #14
M0 - A SN DDR3 DIMM #13
Regulator 8
TPMD Card
Regulator 7
Regulator 6
Regulator 5
M0 - D SN DDR3 DIMM #8
M0 - C SN DDR3 DIMM #7
M0 - B SN DDR3 DIMM #6
M0 - A SN DDR3 DIMM #5
M0 - D SN DDR3 DIMM #12
M0 - C SN DDR3 DIMM #11
M0 - B SN DDR3 DIMM #10
M0 - A SN DDR3 DIMM #9
M0 - D SN DDR3 DIMM #4
M0 - C SN DDR3 DIMM #3
M0 - B SN DDR3 DIMM #2
M0 - A SN DDR3 DIMM #1
Loc Code Conn Ref
P3-C1 J1A
P3-C2 J2A
P3-C3 J3A
P3-C4 J4A
P3-C5
FSI 3
FSI 5
FSI 13
FSI 15
FSI 6
FSI 4
FSI 16
FSI 14
P3-C6
P3-C7 J5A
P3-C8 J6A
P3-C9 J7A
P3-C10 J8A
P3-C11 J1B
P3-C12 J2B
P3-C13 J3B
P3-C14 J4B
P3-C15
P3-C16
P3-C17
P3-C18 J5B
P3-C19 J6B
P3-C20 J7B
P3-C21 J8B
Midplane Connector
Regulator 1
Regulator 2
Regulator 3
Regulator 4
P7+ CP2
SNFSI 0, 4
SNFSI 1, 5
SNFSI 2, 6
SNFSI 3, 7
P7+ CP1
FSI0
FSI1
MC0
SNFSI 0, 4
SNFSI 1, 5
SNFSI 2, 6
SNFSI 3, 7
P7+ CP3
MC0
FSI0
FSI1
SNFSI 0, 4
SNFSI 1, 5
SNFSI 2, 6
SNFSI 3, 7
P7+ CP0
SNFSI 0, 4
SNFSI 1, 5
SNFSI 2, 6
SNFSI 3, 7
FSI0
FSI1
MC0
MC0
FSI0
FSI1
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