LRCK
BICK
SDTI
Audio
Data
Interface
MCLK
RSTN
Modulator
AOUTL
8X
Interpolator
SCF
LPF
AOUTR
VDD
VSS
VCOM
De-emphasis
Control
Control
Port
Clock
Divider
DEM
SMUTE
ACKS
DIF0
DIF1
Modulator
8X
Interpolator
DZF
SCF
LPF
1
MCLK
LRCK
BICK
SMUTE
ACKS
DIF0
To p
View
2
3
4
5
6
7
8
DZF
DEM
VSS
VDD
VCOM
AOUTL
AOUTR
DIF1
16
15
14
13
12
11
10
9
RSTN
SDTI
No.
Pin Name
I/O
Function
1 MCLK I
Master Clock Input Pin
2
BICK I
Audio Serial Data Clock Pin
3
SDTI I
Audio Serial Data Input Pin
4
LRCK I
L/R Clock Pin
5
RSTN I
Reset Mode Pin
SMUTE I
Soft Mute Pin in parallel mode
“ H” : Enable, “ L ” : Disable
6
ACKS I
Auto Setting Mode Pin
“ L” : Manual Setting Mode, “ H” : Auto Setting Mode
7
DIF0 I
Audio Data Interface Format Pin
Audio Data Interface Format Pin
8
9
DIF1 I
10
AOUTR O
Rch Analog Output Pin
11
AOUTL O
Lch Analog Output Pin
12
VCOM O
Common Voltage Pin, VDD/2
13
VSS -
Ground Pin
14
VDD -
Power Supply Pin
15
DEM O
De-emphasis Mode Pin
16 DZF O Zero Input Detect Pin
BLOCK DIAGRAM
TERMINAL DESCRIPTION
PIN CONFIGURATION
Q5: AK4388ET (192kHz 24-bit 2ch DAC )
IC BLOCK DIAGRAMS AND TERMINAL DESCRIPTIONS -68
TX-SR806/SA806
w
w
w
.
x
i
a
o
y
u
1
6
3
.
c
o
m
Q
Q
3
7
6
3
1
5
1
5
0
9
9
2
8
9
4
2
9
8
T
E
L
1
3
9
4
2
2
9
6
5
1
3
9
9
2
8
9
4
2
9
8
0
5
1
5
1
3
6
7
3
Q
Q
TEL 13942296513 QQ 376315150 892498299
TEL 13942296513 QQ 376315150 892498299
http://www.xiaoyu163.com
http://www.xiaoyu163.com
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