Intel 21555 User Manual

14 21555 Non-Transparent PCI-to-PCI Bridge User Manual
Preface
1.5 Register Abbreviations
When a register is associated with the primary interface, its name is preceded with Primary. When a register is
associated with the secondary interface, its name is preceded with Secondary. When a register is shared by both
interfaces, it is not preceded with Primary or Secondary. The byte offsets at which each register can be accessed
from each interface are listed in each register description.
Table 2 lists the register access abbreviations.
Table 2. Register Abbreviations
Access Type Description
DCA Downstream configuration address.
DCD Downstream configuration data.
DIA Downstream I/O address.
DID Downstream I/O data
R Read only. Writes have no effect.
R/W Read/Write.
R/W1TC Read. Write 1 to clear.
R/W1TS Read. Write 1 to set.
R0TS Read 0 to set.
R/(WS) Read. Write from secondary interface only. Primary bus writes have no effect.
R/(WP) Read. Write from primary interface only. Secondary bus writes have no effect.
UCA Upstream configuration address.
UCD Upstream configuration data.
UIA Upstream I/O address.
UID Upstream I/O data.
W1TL Write 1 to load.

Intel 21555 Specifications

General

Brand	Intel
Model	21555
Category	Network Hardware
Language	English