21555 Non-Transparent PCI-to-PCI Bridge User Manual 53
PCI Bus Transactions
5.2.4.3 Write-Through
When the 21555 is able to obtain access to the target bus and start transferring write data to the target before the
transaction has been terminated on the initiator bus, it automatically enters flow-through mode. In flow-through
mode, the 21555 can sustain long write bursts as long as a queue-empty condition is detected in posted write buffers
or until an aligned disconnect boundary is reached. A queue-empty condition exists when the number of Dwords
left in the posted write buffer is less than an unaligned cache line amount. When the queue-empty condition is
detected, the 21555 master terminates the transaction on the target bus. When an aligned disconnect boundary is
reached, the 21555 returns a target disconnect on the initiator bus. Flow-through mode behavior is used for both
memory write and MWI commands.
5.2.4.4 Memory Write Disconnect Mode
The 21555 implements a Memory Write Disconnect Mode bit in device specific configuration space. When
enabled, the 21555 disconnects memory writes on aligned cache line boundaries, using the cache line size
corresponding to the target bus
5.2.4.5 Posted Write Queue Tuning
The 21555 implements a posted write queue management control bit for each posted write queue in the Chip
Control 1 configuration register. This bit specifies at what threshold the 21555 returns a target retry instead of
accepting write data. Setting this bit can minimize fragmentation of posted write transactions and can prevent bursts
from being broken into sub-cache line bursts. The tuning options are as follows:
• Target retry is returned when less then a cache line is free.
For a posted write starting on an odd Dword address, the threshold is CLS-1 Dword entries free.
• Target retry is returned when less then half a cache line is free, for CLS = 8, 16, or 32 Dwords.
When the posted write queue is designated as full, the 21555 returns a target retry to the initiator and does not post
any write data. The 21555 uses the Cache Line Size corresponding to the target bus for the target retry threshold.
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