Intel 460GX - Page 115

Intel® 460GX Chipset Software Developer’s Manual 6-17
Data Integrity and Error Handling
Request Parity
Error
SAC Conditional BINIT# FERR_SAC[RQE] SA_FERR Flag
System
Bus
Parity
Errors
Unsupported ASZ SAC Conditional BINIT# FERR_SAC[ASE] SA_FERR Flag
System
Bus
Parity
Errors
Illegal HITM (HITM
on any Expander
bus access)
SAC Unconditional BINIT# FERR_SAC[IHS] Nothing
Address above
TOM
SAC Unconditional BINIT# FERR_SAC[TE] Nothing
LEN# Protocol
Error
SDC Unconditional BINIT# SDC_FERR[FS0],
FERR_SAC[SFE]
Nothing
DRDY# Protocol
Error
SDC Unconditional BINIT# SDC_FERR[FS2],
FERR_SAC[SFE]
Nothing
Write Data Protocol
Error
SDC Unconditional BINIT# SDC_FERR[FS1],
FERR_SAC[SFE]
Nothing
BERR# Observed SAC Convert to BINIT# FERR_SAC Nothing BERR# to
BINIT#
Enable
IOQ Overflow/
Underflow
SAC Unconditional BINIT# FERR_SAC[IUE] Nothing
External XBINIT#
Active
SAC Unconditional BINIT# FERR_SAC[XBE] Nothing
External XSERR#
Active
SAC Conditional BERR# FERR_SAC[XSA] Nothing BERR#
Driver
Enable
LOCK# when no
resources are
available
SAC Unconditional BINIT# FERR_SAC[LTE] Nothing
Resource Counter
Overflow/
Underflow
SAC Unconditional BINIT# FERR_SAC[RCE] Nothing
Memory System Protocol Errors
SAC-MAC
Command Parity
Error
MAC ERR# pin asserted on
MAC.
Unconditional BINIT# by
SAC.
FERR_SAC[MxE],
FERR_MAC
CMND_FERR
‘Complete’
Command
Underflow
SAC Unconditional BINIT# FERR_SAC[CCxx] Nothing
‘Forward’
overlapping
‘Forward’
SDC Unconditional BINIT# SDC_FERR[FWMDIx],
FERR_SAC[SFE]
Nothing
‘Forward’
overlapping ‘Load’
SDC Unconditional BINIT# SDC_FERR[RdWrx],
FERR_SAC[SFE]
Nothing
‘Load’ overlapping
‘Load’
SDC Unconditional BINIT# SDC_FERR[LRMDIx],
FERR_SAC[SFE]
Nothing
‘Load’ overlapping
‘Forward’
SDC Unconditional BINIT# SDC_FERR[WrRdx],
FERR_SAC[SFE]
Nothing
‘Forward’
Underflow
SDC Unconditional BINIT# SDC_FERR[FRx, FLx],
FERR_SAC[SFE]
Nothing
Table 6-1. Error Cases (Cont’d)
Error
Chip
Detecting
System
Action
Status
Register
Log
Register
Qualifier