Intel 460GX - CONFIG_DATA: Configuration Data Register; Error Handling Registers; Sac

Intel® 460GX Chipset Software Developer’s Manual 2-5
Register Descriptions
subordinate bus number is in that range. For a type 1 cycle, the Bus Number is mapped
to AD[23:16] during the address phase.
15:11 Device Number.
This field selects one agent on the PCI bus selected by the Bus Number. Device 16 (10h)
on Bus #0 is always reserved for programming the CBN. On the bus that the chipset is
mapped into (determined by the CBN register), Device Numbers 0-31 are reserved for
the 460GX chipset components as shown in Table 2-1. All other devices numbers are
forwarded to the selected bus.
1 0:8 Function Number.
This field is mapped to AD[10:8] during PCI configuration cycles. This allows the
configuration registers of a particular function in a multi-function device to be accessed.
7:2 Register Number.
This field selects one register within a particular Bus, Device, and Function as specified
by the other fields in the Configuration Address Register. This field is mapped to AD[7:2]
during PCI configuration cycles.
1:0 reserved (0)
2.3.2 CONFIG_DATA: Configuration Data Register
I/O Address: CFCh Size: 32 bits
Default Value: 00000000h Attribute: Read/Write
Sticky: No Locked: No
CONFIG_DATA is a 32 bit read/write window into configuration space. The portion of
configuration space that is referenced by CONFIG_DATA is determined by the contents of
CONFIG_ADDRESS.
Bits
Description
31:0 Configuration Data Window (CDW).
If bit 31 of CONFIG_ADDRESS is 1 any I/O reference that falls in the CONFIG_DATA
I/O space will be mapped to configuration space using the contents of
CONFIG_ADDRESS.
2.4 Error Handling Registers
2.4.1 SAC
2.4.1.1 SECTID: SEC ITID
Bus CBN, Device Number: 00h Function: 0
Address Offset: 80h Size: 8 bits
Default Value: 00h Attribute: Read Only/Write
Clear, Read/Write
Sticky: Yes Locked: No
This register is used to capture the ITID for a single bit memory ECC error. The ITID can then be
used to determine the address of the failure. To force the ITID to be cleared and re-used, write a 1
to bit 6. This register is set anytime that the SEC bit is sent from the SDC to the SAC on a ’Retire
ITID’ command.