• Transceiver interfaces
— PCIe x16 interface supporting the Gen5 end-point mode connected to a x16
PCIe edge connector (gold edge fingers)
— 2x standard QSFPDD optical module interfaces connected to the F-tile
transceivers
— 1x PCIe/CXL
(1)
interface supporting CXL x16 or PCIe x16 at 32 Gbps via MCIO
connectors
• Memory interfaces
— Two on-board independent single rank DDR4 x72 (ECC) channels operating at
1200 MHz (DDR4-2400)
— Two DIMM sockets supporting dual DIMM for DDR4
• Communication ports
— 2x QSFPDD optical interface port
— JTAG header
— USB (Micro USB) on-board Intel FPGA Download Cable II
— System I2C header
• Buttons, switches, and LEDs
— System reset push button
— CPU reset push button
— PCIe reset push button
— Four dedicated user LEDs
— Link LED of each QSFP28 port to indicate the link and data transceiver
— Two dedicated configuration status LEDs
• Heatsink and Fan
— Air-cooled heatsink assembly
— Red over-temperature warning LED indicator
• Power
— PCIe input power including required 2x4 auxiliary power connector
— Blue power-on LED
— On/off slide power switch for benchtop operation
— On board power and temperature measurement circuitry
• Mechanical
— PCIe standard height form factor (full height, 3/4 length, dual-width)
— 4.376” x 10.0” board size
— 2 slots height with heatsink
• Operating environment
— Maximum ambient temperature of 0–35°C
1. Overview
683288 | 2022.09.22
Intel
®
Agilex
™
I-Series FPGA Development Kit User Guide
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