Intel® Server Board S2600IP and Intel® Workstation Board W2600CR TPSDesign and Environmental Specifications
Revision 1.1
Intel order number G34153-003
other during turn off. Table 69 shows the timing requirements for the power supply being turned
on and off by the AC input, with PSON held low and the PSON signal, with the AC input applied.
All timing requirements must be met for the cross loading condition in section TBD.
Table 69. Output Voltage Timing
Output voltage rise time from each main output.
Output rise time for the 5Vstby output.
All main outputs must be within regulation of
each other within this time.
All main outputs must leave regulation within
this time.
Figure 34. Output Voltage Timing
Table 70. Turn On/Off Timing
Delay from AC being applied to 5VSB being within
regulation.
Delay from AC being applied to all output voltages
being within regulation.
Time all output voltages stay within regulation
after loss of AC. Tested at 75% of maximum load.
Delay from loss of AC to de-assertion of PWOK.
Tested at 75% of maximum load.
Delay from PSON
#
active to output voltages within