Marantz CD5004 - Page 54

54
TerminalFunction
TC94A70FG
4/27
05/09/16
1.PinDescriptions
Pin
No.
Symbol I/O Description Default Remarks
1
AVSS3
－
Grounding pin for 3.3V CD analog circuits.
－
2
RFZi
I
3AI/F
Input pin for RF ripple zero-cross signal. I
Connect to RFRP by
0.033uF
3
RFRP
O
3AI/F
RF ripple signal output pin. O
4
SBAD/RFDC
O
3AI/F
Sub beam addition signal or
RFDC (Hologram PUH RF peak detection
signal) signal output pin
O
5
FEi
O
3AI/F
Focus error signal input pin. O
6
TEi
O
3AI/F
Tracking error signal input pin. O
Monitor pin for the signal.
7
TEZi
I
3AI/F
Tracking error signal zero-cross input pin. I Connect to TEI by 0.033uF
8
AVDD3
－
Power supply pin for 3.3 V CD analog
circuits.
－
9
Foo
O
3AI/F
Focus servo equalizer output pin. O
10
TRo
O
3AI/F
Tracking servo equalizer output pin.
O
Built-in series resister 3.3k
Ω
11
VREF
－
Reference voltage pin for analog
circuits(1.65V)
－
Connect to VRO and
PVREF. Connect 0.1uF
12
FMo
O
3AI/F
Feed servo equalizer output pin. O
13
DMo
O
3AI/F
Disc servo equalizer output pin O
Built-in series resister
3.3kΩ 3-state output
(AVDD3,AVSS3,VREF)
14
VSSP3
－
Grounding pin for 3.3V DSP VCO circuits.
－
15
VCOi
I
3AI/F
DSP VCO control voltage inputr pin.
I
16
VDDP3
－
Power supply pin for 3.3V DSP VCO
circuit.
－
17
VDD1
－
Power supply pin for 1.5V digital circuit
－
18
VSS
－
Grounding pin for 1.5V digital circuit.
－
19
FGiN
I
3I/F
FG signal input pin for CAV.
CLV: "L", CAV: FG input
I Analog input
20
io0(/HSo)
I/O
3I/F
General Input/output port -0 (CD)
(Playback speed mode flag output pin.)
I
Schmitt input
CMOS PORT
21
io1(/UHSo)
I/O
3I/F
General Input/output port -1 (CD)
(Playback speed mode flag output pin.)
I
Schmitt input
CMOS PORT
22
XVSS3
－
Grounding pin for 3.3V system clock
oscillator circuit.
－
23
Xi
I
3AI/F
Input pin for system clock oscillator
Circuit (External Rfb=1MΩ)
I X'tal
24
Xo
O
3AI/F
Output pin for system clock oscillator
circuit
O X'tal
25
XVDD3 －
Power supply pin for 3.3 V system clock
oscillator circuit
－
TC94A70FG
6/27
05/09/16
Pin
No.
Symbol I/O Description Default Remarks
56
IPF
O
3I/F
Correction flag output O CMOS PORT
57
SFSY
O
3I/F
Servo internal register read clock output pin O CMOS PORT
58
ZDET
O
3I/F
Internal Audio DAC Zero data detection flag
output
O CMOS PORT
59
GPIN
I
3I/F
CD General Input port(Pull down by 100KΩ
when not in use)
I Schmitt input
60
MS
I
3I/F
Microprocessor I/F mode selection pin.
“L”: Parallel I/F, “H”: Serial I/F
I
61
DoUT(Po6)
O
3I/F
Digital Audio output (SPDIF) pin
(DSP general output port -6)
O CMOS PORT
62
AoUT1(Po7)
O
3I/F
Audio data output pin -1(DSP general
output port -7)
O CMOS PORT
63
BCKo(Po8)
O
3I/F
Bit clock output pin for AoUT
(DSP general output port -8)
O CMOS PORT
64
LRCKo(Po9)
O
3I/F
L/R channel clock output pin
(DSP general output port -9)
O CMOS PORT
65
AiN(Pi4)
I
3I/F
Audio data input for Audio DAC
(DSP general input port -4)
I Schmitt input
66
BCKi(Pi5)
I
3I/F
Bit clock input pin for AiN
(DSP general input port -5)
I Schmitt input
67
LRCKi(Pi6)
I
3I/F
L/R channel clock for AiN
(DSP general input port -6)
I Schmitt input
68
VDD1
－
Power supply pin for 1.5V digital circuit.
－
69
VSS
－
Grounding pin for 1.5V digital circuit.
－
70
AWRC
O
3AI/F
VCO control pin for active wide-range PLL O
Applicable in CLV/CAV
mode. Connect 0.033 uF.
71
PVDD3
－
Power supply pin for 3.3V CD PLL circuit.
－
72
PDo
O
3AI/F
EFM and PLCK Phase difference signal
output pin.
O
4-state output (
PVDD3,
Hiz,PVSS3,PVREF)
73
TMAXS
O
3AI/F
TMAX detection result output pin O
3-state output
(PVDD3,PVSS3,HiZ)
74
TMAX
O
3AI/F
TMAX detection result output pin O
3-state
output(PVDD3,PVSS3,HiZ)
75
LPFN
I
3AI/F
PLL circuit LPF amplifier inversion input pin I
Connect resister of LPF,
refer to application circuit
diagram.
76
LPFo
O
3AI/F
PLL circuit LPF amplifier Output pin O
Connect capacitor of LPF,
refer to application circuit
diagram.
77
PVREF
－
PLL circuit 1.65 V reference voltage pin.
－
Connected to VREF and
VRO inside of IC. Connect
0.1uF.
78
VCoF
O
3AI/F
VCO filter pin O Connect 0.01uF.
79
PVSS3
－
Grounding pin for 3.3V CD PLL circuit.
－
80
SLCo
O
3AI/F
EFM slice level output pin.
Output impedance =2.5kΩ both of
analog/digital slice mode.
O
Connect capacitor
according with servo
frequency band.
81
RFi
I
3AI/F
RF signal input pin
Zin is selectable by command.
I
Zin：20kΩ，10kΩ，5kΩ
82
RFRPi
I
3AI/F
RF ripple signal input pin I
TC94A70FG
5/27
05/09/16
Pin
No.
Symbol I/O Description
Default Remarks
26
DVSS3
－
Grounding pin for 3.3V DAC circuit
－
27
Ro
O
3AI/F
R channel audio output pin of Audio DAC. O
28
DVDD3
－
Power supply pin for 3.3V Audio DAC
circuit.
－
29
DVR
－
Reference voltage pin for Audio DAC.
－
30
Lo
O
3AI/F
L channel audio output pin of Audio DAC O
31
DVSS3
－
Grounding pin for 3.3V Audio DAC circuit
－
No capacitor required to
DVR pin when built-in
audio DAC is not in use,
however , connect 3.3V to
DVDD3 and GND to
DVSS3.
32
VDDT3
－
Power supply pin for 3.3 V digital I/O circuit.
－
For CD and DSP I/O
33
VSS
－
Grounding pin for 3.3V digital circuit
－
-
34
VDD1
－
Power supply pin for 1.5V digital circuit.
－
-
35
VDDM1
－
Power supply pin for 1.5V 1Mbit SRAM.
－
36
SRAMSTB
I
3I/F
1Mbit SRAM stand-by pin I Schmitt input
37
/RST
I
3I/F
Reset signal input pin. I Schmitt input
38
BUS0
IO
3I/F
Data input/output pin -0 for
microcontroller interface
I
Schmitt input
CMOS PORT
39
BUS1
IO
3I/F
Data input/output pin -1 for
microcontroller interface
I
Schmitt input
CMOS PORT
40
BUS2(So)
IO
3I/F
Data input/output pin -2 for
microcontroller interface (Serial output)
I
Schmitt input
CMOS PORT
41
BUS3(Si)
IO
3I/F
Data input/output pin -3 for
microcontroller interface (Serial input)
I
Schmitt input
CMOS PORT
42
BUCK(CLK)
I
3I/F
Clock input pin for the microcontroller
interface. (Clock input for Serial
communication interface)
I Schmitt input
43
/CCE
I
3I/F
Chip enable signal input pin for
microcontroller interface.
I Schmitt input
44
TEST
I
3I/F
Setting pin for LSI test mode.
(Connect to GND in normal operation)
I Schmitt input
45
IRQ
I
3I/F
DSP interruption pin.(Pull down by 100kΩ
when not in use)
I Schmitt input
46
AoUT3(Po4)
O
3I/F
Audio data output pin -3 (DSP general
output port -4)
O CMOS PORT
47
AoUT2(Po5)
O
3I/F
Audio data output pin -2 (DSP general
output port -5)
O CMOS PORT
48
Pio0
I/O
3I/F
DSP general input/output port -0 I
Schmitt input
CMOS PORT
49
Pio1
I/O
3I/F
DSP general input/output port -1 I
Schmitt input
CMOS PORT
50
Pio2
I/O
3I/F
DSP general input/output port -2 I
Schmitt input
CMOS PORT
51
Pio3
I/O
3I/F
DSP general input/output port -3
I
Schmitt input
CMOS PORT
52
VSS
－
Grounding pin for 3.3V digital circuit
－
-
53
VDDT3
－
Power supply pin for 3.3 V digital I/O circuit.
－
For CD and DSP I/O
54
SBSY
O
3I/F
Sub code block sync output pin O CMOS PORT
55
SBOK
O
3I/F
CRCC check result output pin for sub code
Q data.
O CMOS PORT
TC94A70FG
7/27
05/09/16
Pin
No.
Symbol I/O Description Default Remarks
83
RFEQo
O
3AI/F
RF equalizer circuit output pin. O
Connect to RFRPI by
0.1uF, to RFI by 4700pF.
84
VRo
O
3AI/F
1.65 V reference voltage output pin. O
Connected to VREF and
PVREF inside of IC.
Connect 0.1uF+100uF.
85
RESiN
O
3AI/F
Pin for connecting a resistor for reference
current generation.
O
Connect 22kΩ//0.01uF.
86
VMDiR
－
Reference voltage output pin for LD APC.
－
Connect 0.1uF
87
TESTR
O
3AI/F
LPF connection pin for RFEQO offset
correction circuit.
O
Connect more than
0.015uF.
88
AGCi
I
3AI/F
RF signal AGC amplifier input pin I
89
RFo
O
3AI/F
RF signal generation amplifier output pin O
90
RVDD3
－
Power supply for 3.3V RF amplifier core
circuit.
－
91
LDo
O
3AI/F
Laser diode amplifier output pin.
92
MDi
I
3AI/F
Monitor photodiode amplifier input pin. I
Reference
Voltage=178mVtyp.
93
RVSS3
－
Grounding pin for RF amplifier core circuit
－
94
FNi2
I
3AI/F
Main beam signal input pin.
To be connected to PIN diode C.
I
95
FNi1
I
3AI/F
Main beam signal input pin.
To be connected to PIN diode A.
I
96
FPi2
I
3AI/F
Main beam signal input pin.
To be connected to PIN diode D.
I
97
FPi1
I
3AI/F
Main beam signal input pin.
To be connected to PIN diode B.
I
98
TPi
I
3AI/F
Sub beam signal input pin.
To be connected to PIN diode F.
I
99
TNPC
O
3AI/F
TNI/TPI input common capacitor connection
pin.
O
Connect to VRO by
capacitor.
100
TNi
I
3AI/F
Sub beam signal input pin.
To be connected to PIN diode E.
I
* 3A I/F : : 3 V analog circuit input/output pin.
1.5 I/F : 1.5Vdigital input/output pin.
3 I/F : 3 V digital input/output pin.
Note: The servo output pins (FOO, TRO, FMO, and DMO) become undefined or GND level under the following
conditions:
• /RST pin = Low
• Crystal oscillation stopped according to the instructions by the Stop crystal oscillation command
• Power supply for CD is OFF.
• SRAMSTB pin = High
To prevent the undefined pin states from affecting the servo circuitry or any other mechanical blocks in the
system, appropriate measures should be taken, such as using a driver IC supporting a standby feature to
place the system in standby mode while either of the above conditions is satisfied.