SEMICONDUCTORS
Only major semiconductors are shown, general semiconductors etc. are omitted to list.
The semiconductor which described a detailed drawing in a schematic diagram are omitted to list.
1. IC's
STM32F101ZF (IC11)
Block diagram
Pin descriptions
Description STM32F101xC, STM32F101xD, STM32F101xE
12/106 Doc ID 14610 Rev 7
Figure 1. STM32F101xC, STM32F101xD and STM32F101xE access line block
diagram
1. T
A
= –40 °C to +85 °C (junction temperature up to 105 °C).
2. AF = alternate function on I/O port pin.
PA[15:0]
EXT.IT
112AF
AHB2
WKUP
F
max
: 36 MHz
V
SS
I2C2
GP DMA1
TIM2
TIM3
XTAL 32 kHz
Flash 512 Kbytes
V
DD
Backup interface
TIM4
Bus Matrix
64 bit
RTC
RC 8 MHz
Cortex-M3 CPU
Dbus
obl
Flash
interface
USART 2
SPI2
Backup
reg
I2C1
RX, TX, CTS, R T S,
USART 3
RC 40 kHz
Standby
IWDG
@
V
BAT
POR / PDR
@V
DDA
V
BAT
=1.8 V to 3.6 V
CK, as AF
RX, TX, CTS, RTS,
CK, as AF
NVIC
SPI1
interface
@VDDA
PVD
Int
AHB2
APB2
A WU
SPI3
UART4
RX, TX as AF
UART5
RX,TX as AF
TIM5
P LL
@V
DDA
FSMC
DAC_OUT1 as AF
DAC_OUT2 as AF
SRAM
48 KB
GP DMA2
TIM6
TIM7
NJTRST
JTDI
JTCK/SWCLK
JTMS/SWDIO
JTDO
as AF
A[25:0]
D[15:0]
CLK
NOE
NWE
NE[4:1]
NBL[1:0]
NWAIT
NL
as AF
7 channels
5 channels
GPIO port A
GPIO port B
GPIO port C
GPIO port D
GPIO port E
GPIO port F
GPIO port G
USART1
Temp. sensor
12-bit ADC
IF
PB[15:0]
PC[15:0]
PD[15:0]
PE[15:0]
PF[15:0]
PG[15:0]
ADC_IN[0:15]
@ V
DDA
APB2: Fmax = 24/36 MHz
APB1
Trace
controller
Pbus
Ibus
System
Reset &
Clock
control
PCLK1
PCLK2
HCLK
FCLK
Power
Volt. reg.
3.3 V to 1.8 V
Supply
supervision
@V
DD
POR
Reset
NRST
V
DDA
V
SSA
OSC_IN
OSC_OUT
@V
DD
XTAL OSC
4-16 MHz
OSC32_IN
OSC32_OUT
TAMPER-RTC/
ALARM/SECOND OUT
4 channels as AF
4 channels as AF
4 channels as AF
4 channels as AF
MOSI, MISO
SCK, NSS as AF
MOSI, MISO
SCK, NSS as AF
SCL, SDA, SMBA as AF
SCL, SDA, SMBA as AF
WWDG
ai14693d
APB1: F
max
= 24/36 MHz
TRACECLK
TRACED[0:3]
as AS
SW/JTAG
TPIU
Trace/trig
V
REF+
V
REF–
MOSI, MISO, SCK,
NSS as AF
RX, TX, CTS, RTS
as AF
12bit DAC1
IFIF
IF
12bit DAC 2
STM32F101xC, STM32F101xD, STM32F101xE Pinouts and pin descriptions
Doc ID 14610 Rev 7 23/106
3 Pinouts and pin descriptions
Figure 3. STM32F101xC, STM32F101xD and STM32F101xE access line LQFP144 pinout
V
DD_3
V
SS_3
PE1
PE0
PB9
PB8
BOOT0
PB7
PB6
PB5
PB4
PB3
PG15
V
DD_11
V
SS_11
PG14
PG13
PG12
PG11
PG10
PG9
PD7
PD6
V
DD_10
V
SS_10
PD5
PD4
PD3
PD2
PD1
PD0
PC12
PC11
PC10
PA15
PA14
PE2
V
DD_2
PE3
V
SS_2
PE4
NC
PE5
PA13
PE6
PA12
VBAT
PA11
PA10
PC14-OSC32_IN
PA9
PC15-OSC32_OUT
PA8
PF0
PC9
PF1
PC8
PF2
PC7
PF3
PC6
PF4
V
DD_9
PF5
V
SS_9
V
SS_5
PG8
V
DD_5
PG7
PF6
PG6
PF7
PG5
PF8
PG4
PF9
PG3
PF10
PG2
OSC_IN
PD15
OSC_OUT
PD14
NRST
V
DD_8
PC0
V
SS_8
PC1
PD13
PC2
PD12
PC3
PD11
V
SSA
PD10
V
REF-
PD9
V
REF+
PD8
V
DDA
PB15
PA0-WKUP
PB14
PA1
PB13
PA2
PB12
PA3
V
SS_4
V
DD_4
PA4
PA5
PA6
PA7
PC4
PC5
PB0
PB1
PB2
PF11
PF12
VSS_6
V
DD_6
PF13
PF14
PF15
PG0
PG1
PE7
PE8
PE9
V
SS_7
V
DD_7
PE10
PE11
PE12
PE13
PE14
PE15
PB10
PB11
V
SS_1
V
DD_1
144
143
142
141
140
139
138
137
136
135
134
133
132
131
130
129
128
127
126
125
124
123
122
121
109
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
108
107
106
105
104
103
102
101
100
99
98
97
96
95
94
93
92
91
90
89
88
87
86
85
84
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
72
LQFP144
120
119
118
117
116
115
114
113
112
111
110
61
62
63
64
65
66
67
68
69
70
71
26
27
28
29
30
31
32
33
34
35
36
83
82
81
80
79
78
77
76
75
74
73
64
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