Marantz PS-17 - Page 28

44
No. Name I/O FUNCTION
56 SURENC O Detection of AC-3 2/0 mode Dolb
y
surround encoded input
57
/
SDBCK0 O Inverted SDBCK0 clock output
(
refer to Block dia
g
ram
)
58 RAMA6 O External SRAM interface address 6
59 RAMA5 O External SRAM interface address 5
60 VSS - Ground
61 RAMA4 O External SRAM interface address 4
62
/
IC Is Initial clear
63 TEST Test terminal
(
to be open in normal use
)
64 RAMA3 O External SRAM interface address 3
65
/
CSB Is+ Sub DSP Chip select
66
/
CS Is Microprocessor interface Chip select input
67 SO Ot Microprocessor interface Serial data output
68 SI Is Microprocessor interface / Sub DSP Serial data input
69 SCK Is Microprocessor interface / Sub DSP clock input
70 RAMA2 O External SRAM interface address 2
71 VDD1 - +5V power suppl
y
(
for I/Os
)
72 RAMD0 I+/ O External SRAM interface data (STREAM0 output when External
SRAM is not in use
)
73 RAMD1 I+/ O External SRAM interface data (STREAM1 output when External
SRAM is not in use
)
74 RAMD2 I+/ O External SRAM interface data (STREAM2 output when External
SRAM is not in use
)
75 RAMD3 I+/ O External SRAM interface data (STREAM3 output when External
SRAM is not in use
)
76 RAMD4 I+/ O External SRAM interface data (STREAM4 output when External
SRAM is not in use
)
77 RAMD5 I+/ O External SRAM interface data (STREAM5 output when External
SRAM is not in use
)
78 RAMD6 I+/ O External SRAM interface data (STREAM6 output when External
SRAM is not in use
)
79 RAMD7 I+/ O External SRAM interface data (STREAM7 output when External
SRAM is not in use
)
80 VSS - Ground
81 VDD2 - +3.3 V power suppl
y
(
for core lo
g
ic
)
82 SDWCK0 I Word clock input for SDIA, SDOA, SDIB, SDOB
83 SDBCK0 I Bit clock input for SDIA, SDOA, SDIB, SDOB
84 SDIA0 I AC-3 bitstream
(
or PCM
)
data input for Main DSP
85 SDIA1 I AC-3 bitstream
(
or PCM
)
data input for Main DSP
86 RAMA1 O External SRAM interface address 1
87 RAMA0 O External SRAM interface address 0
88 RAMWEN O External SRAM interface /WE
89 RAMOEN O External SRAM interface /OE
90 VSS - Ground
91 VDD2 - +3.3 V power suppl
y
(
for core lo
g
ic
)
92 IPORT7 I+ Input port for
g
eneral purpose
93 IPORT6 I+ Input port for
g
eneral purpose
94 IPORT5 I+ Input port for
g
eneral purpose
95 IPORT4 I+ Input port for
g
eneral purpose
96 IPORT3 I+ Input port for
g
eneral purpose
97 IPORT2 I+ Input port for
g
eneral purpose
98 IPORT1 I+ Input port for
g
eneral purpose
99 IPORT0 I+ Input port for
g
eneral purpose
100 VSS - Ground
NOTE
)
Is: Schmidt tri
gg
er input terminal
I+: Input terminal with a pull-up resistor
O: Di
g
ital output terminal
Ot: Tri-state di
g
ital output terminal
A: Analo
g
terminal