MiTAC 8575 - Page 144

143
8575
8575
N/B Maintenance
N/B Maintenance
U27
Clock
Buffer
ICS93722
P11
CLK_DDR0
CLK_DDR0#
CLK_DDR1
CLK_DDR1#
CLK_DDR2
CLK_DDR2#
CLK_DDR3
CLK8_DDR3#
CLK_DDR4
CLK_DDR4#
CLK_DDR5
CLK_DDR5#
R90
R91
R89
R88
R94
R93
0
0
0
0
0
0
R98
R97
R100
R101
R102
R102
0
0
0
0
0
0
2
1
4
5
13
14
19
17
16
24
25
26
27
J505
P12
P12
L24
600Z/100M
+2.5_DDR
C110
0.1µ
3,12,23
8.2 No Display
****** System Clock Check ******
Bit 7
FS3
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
Bit 6
FS2
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
Bit 4
FS1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
Bit 5
FS0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
CPU
(MHz)
66.7
100.00
100.00
100.00
100.00
100.00
100.00
100.00
100.00
100.00
100.00
80.00
80.00
95.00
95.00
66.67
SDRAM
(MHz)
66.67
100.00
200.00
133.33
150.00
125.00
160.00
133.33
200.00
166.67
166.67
133.33
133.33
95.00
126.67
66.67
ZCLK
(MHz)
66.67
66.67
66.67
66.67
60.00
62.50
66.67
80.00
66.67
62.50
71.43
66.67
66.67
63.33
63.33
50.00
AGP
(MHz)
66.67
66.67
66.67
66.67
60.00
62.50
66.67
66.67
66.67
62.50
83.33
66.67
66.67
63.33
63.33
50.00
Bit 2
FS4
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
C150
0.1µ
C112
0.1µ
C99
10µ
C101
1000P
C111
0.1µ
L22
300Z/100M
+2.5_DDR
10
VDDA
VDD[0:2]
FWDSDCLKO
CBVDDA
CBVDD
8
CLK_INT
C196
10P
20
BF_OUT
R99
22
FBINT
FB_OUTT
J506
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