7 FUNCTIONS
7.1 Cyclic Transmission
27
7
Precautions
■Latched devices of the CPU module
If data in latched devices of the CPU module is cleared to zero in a program when the CPU module is powered off and on or
reset, the data may be output without being cleared to zero, depending on the timing of link scan and link refresh. Take the
following actions so as not to output the data in the latched devices of the CPU module.
*1 For MELSEC iQ-F, the file register (R) is latched if this register is specified to be included in the latch range.
*2 The devices are available for MELSEC-Q/L. ( User's Manual (Function Explanation, Program Fundamentals) for the CPU module
used)
■Boundary between extended data register (D) and extended link register (W)
Do not set the refresh range beyond the boundary between the user device and extended data register (D)
*1
or extended link
register (W)
*1
.
*1 The devices are available for MELSEC-Q/L. ( User's Manual (Function Explanation, Program Fundamentals) for the CPU module
used)
CPU module device How to disable the device data
File register (R, ZR)
*1
Use the device initial value to clear the device to zero.
Latch relay (L) Delete from the refresh settings
Devices within the latch range, extended data register (D)
*2
and extended link
register (W)
*2
Delete all the latch range settings.
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