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MELSEC-Q
7 APPLICATION FUNCTIONS
2) If an address in the link refresh range is specified, data is written to
that address when the instruction is executed, but the link device of the
network module is overwritten by the link device data of the CPU
module by the link refresh.
Make sure to write the same data to the link device of the CPU module
as well when writing by direct access (same for B, Y, SB and SW).
CPU
20 to 300
LW
Network module
100
300
W
100
MOV K20 J1\W100
Link refresh
CPU
20
LW
100
20
W
100
MOV K20 J1\W100
MOV K20 W100
Network module
Link refresh
(3) Differences from the link refresh
The following table shows how the direct access to link devices is different from
the link refresh.
For details, refer to the User's Manual (Function Explanation, Program
Fundamentals) of the CPU module used.
Access method
Item
Link refresh Direct access
Number of steps 1 step 2 steps
Processing speed (LD BO – | | –) 1 High speed (0.034 µs) Low-speed (several 10 µs)
Data reliability Per station 2 2-word units (32 bits) 3
1: For Q02HCPU
2: When the parameter of the station-based block data assurance is enabled.
3: When the 32-bit data assurance conditions are satisfied.
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