Mitsubishi Electric Q06HCPU - Page 568

566
*1 The following modules support these areas:
• Universal model QCPU whose serial number (first five digits) is "10102" or later
• Q00UJCPU, Q00UCPU, Q01UCPU
*2 Modules whose serial number (first five digits) is "16112" or later
D9116 SD1116

I/O module
verification
error
Bit pattern, in units
of 16 points,
indicating the
modules with
verification errors
• If the status of the I/O module changes from that obtained
at power-on, the module No. (unit: 16 points) is stored in
the following bit pattern. (When I/O module numbers
have been set by the parameter, the parameter-set
numbers are stored.)
For a module whose number of I/O points exceeds 16
points, all bits corresponding to I/O module numbers within
the number of I/O points occupied by the module (in
increments of 16 points) turn on.
Example: When a 64-point module is mounted on the slot 0,
b0 to b3 turn on when an error is detected.
• I/O module verification is conducted on I/O modules on
remote I/O stations. (If normal status is restored, clear is
not performed. Therefore, it is required to perform clear
by user program.)
Qn(H)
QnPH
QnU
*1
LCPU
D9117 SD1117
D9118 SD1118
D9119 SD1119
D9120 SD1120
D9121 SD1121
D9122 SD1122
D9123 SD1123
D9124 SD1124 SD63
Number of
annunciator
detections
Number of
annunciator
detections
When any of F0 to F2047 (default device setting) is turned
on by the SET F instruction, a value in SD1124 is
incremented by one (up to a maximum of 16). When the
RST F or LEDR instruction is executed, it is decremented
by one.
Qn(H)
QnPH
QnU
*1
LCPU
D9125 SD1125 SD64
Annunciator
detection
number
Annunciator
detection number
When any of F0 to F2047 (default device setting) are turned
on by the SET F instruction, the annunciator numbers (F
numbers) that are turned on are stored in SD1125 to
SD1132 in order.
The F numbers turned off by the RST F instruction is
deleted from this register, and the F numbers stored after
the deleted F numbers are shifted to the previous registers.
When the LEDR instruction is executed, the contents of
SD1125 to SD1132 are shifted upward by 1.
When there are eight annunciator detections, the next one
is not stored in SD1125 to SD1132.
Qn(H)
QnPH
QnU
*1
LCPU
D9126 SD1126 SD65
D9127 SD1127 SD66
D9128 SD1128 SD67
D9129 SD1129 SD68
D9130 SD1130 SD69
D9131 SD1131 SD70
D9132 SD1132 SD71
ACPU
special
register
Special
register
after
conversion
Special
register
after
modification
Name Meaning Explanation
Corresponding
CPU
b15 b14 b13 b12 b11 b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0
0000000000000
000000000000000
00000000000000
1
XY
7B0
SD1116
SD1117
SD1123
1
XY
0
1
XY
190
0
00
Indicates an I/O module verify error
SD1009
SD1124
0505050505050
01 2 3 2 3 4
0505050505050
SD1125
SD1126
SD1127
SD1128
SD1129
SD1130
SD1131
SD1132
0 0 25 25 99 99 99
0 0 0 99 0 15 15
00 0 0 0 070
00 0 0 0 0 0
00 0 0 0 0 0
00 0 0 0 0 0
00 0 0 0 0 0
50
5
50
99
15
70
65
0
0
0
99
4
99
15
70
65
0
0
0
0
LEDR
SET
F25
SET
F99
RST
F25
SET
F15
SET
F70
SET
F65
0505050505050
01 2 3 2 3 4
0505050505050
0 0 25 25 99 99 99
0 0 0 99 0 15 15
00 0 0 0 070
00 0 0 0 0 0
00 0 0 0 0 0
00 0 0 0 0 0
00 0 0 0 0 0
50
5
50
99
15
70
65
0
0
0
99
4
99
15
70
65
0
0
0
0
SET
F50
(Number
detected)
(Number of
annunciators
detected)
(Number
detected)