Mitsubishi Electric Q26UD(E)HCPU - Page 523

521
APPENDICES
A
Appendix 3 List of Special Register Areas
(2) System information
Number Name Meaning Explanation
Set by
(When Set)
Corresponding
ACPU
D9
Corresponding
CPU
SD200
Status of
switch
Status of
CPU switch
• This register stores the status of the CPU module switches
in the following bit pattern.
S (Every
END
processing)
New
Qn(H)
QnPH
QnPRH
This register stores the status of the CPU module switches in
the following bit pattern.
Q00J/Q00/Q01
This register stores the status of the CPU module switches in
the following bit pattern.
S (when
RUN/STOP
/RESET
switch
changed)
QnU (except
QnUDV)
This register stores the status of the CPU module switches in
the following bit pattern.
QnUDV
This register stores the status of the CPU module switches in
the following bit pattern.
*1 For the L02SCPU and L02SCPU-P, 2) is fixed at "0".
LCPU
b15 b12 b11 b8 b7 b4 b3 b0
1)2)
Empty
3)
to tototo
1): CPU switch status
0: RUN
1: STOP
2: L.CLR
2): Memory card
switch
Always OFF
3): DIP switch
b8 through b12 correspond to SW1
through SW5 of system setting switch 1.
0: OFF, 1: ON.
b13 through b15 are empty.
b15 b8 b7 b4 b3 b0
1)2)
Empty
to to
to
1): 0: RUN
1: STOP
2):
CPU switch status
Memory card switch Always OFF
b15 b8 b7 b4 b3 b0
1)2)
Empty
to to
to
1): 0: RUN
1: STOP
2):
CPU switch status
Memory card switch Always OFF
b15
1)2)
Empty
to
1): 0: RUN
1: STOP
2):
CPU switch status
SD memory card
lock switch
b4 b3 b0
to
b6 b5
0: OFF
1: ON
b15
1)2)
Empty
to
1): 0: RUN
1: STOP
2):
CPU switch status
SD memory card
switch
*1
b4 b3 b0
to
b6 b5
0: Not usable
1: Usable