EasyManuals Logo

Motorola MC68030 User Manual

Motorola MC68030
254 pages
To Next Page IconTo Next Page
To Next Page IconTo Next Page
To Previous Page IconTo Previous Page
To Previous Page IconTo Previous Page
Page #37 background imageLoading...
Page #37 background image
Introduction
1-14
MC68030 USER’S MANUAL
MOTOROLA
1.7 THE MEMORY MANAGEMENT UNIT
The MMU supports virtual memory systems by translating logical addresses to physical ad-
dresses using translation tables stored in memory. The MMU stores address mappings in
an address translation cache (ATC) that contains the most recently used translations. When
the ATC contains the address for a bus cycle requested by the CPU, a translation table
search is not performed. Features of the MMU include:
Multiple Level Translation Tables with Short- and Long-Format Descriptors for Efficient
Table Space Usage
Table Searches Automatically Performed in Microcode
22-Entry Fully Associative ATC
Address Translations and Internal Instruction and Data Cache Accesses Performed in
Parallel
Eight Page Sizes Available Ranging from 256 to 32K Bytes
Two Optional Transparent Blocks
User and Supervisor Root Pointer Registers
Write Protection and Supervisor Protection Attributes
Translations Enabled/Disabled by Software
Translations Can Be Disabled with External MMUDIS
Signal
Used and Modified Bits Automatically Maintained in Tables and ATC
Cache Inhibit Output (CIOUT
) Signal Can Be Asserted on a Page-by-Page Basis
32-Bit Internal Logical Address with Capability To Ignore as many as 15 Upper Address
Bits
3-Bit Function Code Supports Separate Address Spaces
32-Bit Physical Address
The memory management function performed by the MMU is called demand paged memory
management. Since a task specifies the areas of memory it requires as it executes, memory
allocation is supported on a demand basis. If a requested access to memory is not currently
mapped by the system, then the access causes a demand for the operating system to load
or allocate the required memory image. The technique used by the MC68030 is paged
memory management because physical memory is managed in blocks of a specified
number of bytes, called page frames. The logical address space is divided into fixed-size
pages that contain the same number of bytes as the page frames. Memory management
assigns a physical base address to a logical page. The system software then transfers data
between secondary storage and memory one or more pages at a time.

Table of Contents

Questions and Answers:

Question and Answer IconNeed help?

Do you have a question about the Motorola MC68030 and is the answer not in the manual?

Motorola MC68030 Specifications

General IconGeneral
BrandMotorola
ModelMC68030
CategoryComputer Hardware
LanguageEnglish

Related product manuals