December 6, 2004 68P81083C20-D
7-8 Controller Section Theory of Operation: Power Control
Rise and fall time is controlled by the D/A adjustable control voltage limit circuit attached to the
reference voltage at U0550 pin 10 via transistor Q0555. The reference voltage at U0550 pin 10 is
pulled low by Q0555 when the PA control voltage approaches the limit set by the D/A output PA
CNTL LIM, U0551 pin 13. The PA control voltage at U0550 pin 8 connects to opamp noninverting
input U0202 pin 3 through the voltage divider formed by R0592 and R0591 and lowpass capacitor
C0572. Control voltage limit is set by the D/A output PA CNTL LIM at U0551 pin 13 which connects
to inverting input U0202 pin 2 through R0584, Q0556 and R0590. Transistor Q0556 is connected to
the PA disable line, PA DIS which effectively pulls the control voltage limit to zero volts, and activates
Q0555 to pull the reference voltage to zero when control voltage is greater than zero.
Protection features
The transmit power control circuit has three protection mechanisms. They are 1) thermal cutback, 2)
current limit and 3) PA control voltage limit. These features operate by adding current to the ALC
loop inverting input at U0550 pin 9 through diodes CR0550 and CR0551 and decreasing the PA
control voltage. When the voltage exceeds 4.65 volts plus one diode drop at any cathode of diodes
CR0550 and CR0551, current begins to flow into the ALC loop increasing the voltage at the inverting
input U0550 pin 9. As a result the PA control voltage at U0550 pin 8 decreases in response to
excessive PA control voltage, final device temperature, and final device current.
Thermal cutback limits the PA temperature by reducing the PA control voltage as temperature
increases during extended periods of transmitter operation or high ambient temperatures.
PA TEMP, set by a thermistor to gnd near the PA final devices, connects to an inverting amplifier
through resistor R0550 to inverting input U0550 pin 2. The noninverting input U0550 pin 3 is
connected to a 4.65 volt reference (3.6 volt for UHF 40 W) formed by voltage divider resistors R0576
and R0582 which connect to ground and the 9.3 volt supply. The output of the inverting amplifier at
U0550 pin 1 is the product of the amplifier gain as determined by the ratio of R0551 divided by
R0550 and the difference between the amplifier inputs pins 2 and 3. When the PA TEMP input is
greater than 4.65 volts the amplifier output is less than 5 volt.
As temperature rises the voltage on PA TEMP falls, the inverting amplifier output at U0550 pin 1
rises, current begins to flow through R0552 and CR0550 into the ALC loop at the inverting input of
U0550 pin 9, decreasing the PA control voltage PA CNTL and reducing transmitter output.
Current limit is provided to protect the PA final device (Q5540) from over-current caused by low line
voltage and/ or mismatched antennas.
CURRENT SENSE+/ CURRENT SENSE- voltages are set by a small resistor (~0.01 ohm, varies per
power level) between A+ and the collector of the RF Power Amplifier Final Devices. The difference
between the two voltages is proportional to the current supplied to the final devices. Voltage dividers
on the current sense lines, CURRENT SENSE+/ CURRENT SENSE-, formed by resistors R0557/
R0558 and R0559/R0560 protect the inputs of U0550 (pins 5 and 6) from excessive voltages.
CURRENT SENSE+ connects to the non-inverting input U0550 pin 5 through resistors R0557 and
R0548. CURRENT SENSE- connects to the inverting input U0550 pin 6 through resistors R0559 and
R0598. As current through the final device increases, voltage drop through R5612 (PA sense
resistor) increases and CURRENT SENSE- decreases with respect to CURRENT SENSE+ (A+),
increasing the difference between inverting and non-inverting inputs, causing the amplifier output at
U0550 pin 7 to increase to over 4.65 volts plus one diode drop. As the amplifier output increases to
over 5 volts, the current through resistor R0556 and diode CR0550 becomes sufficient to reduce the
PA control voltage reducing the PA device power and current.
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