R3104
R3103
R3102
R3105
PRISPIVCC
DC_SW3_1.8V
CPCAP
SSI
SPI
AUDIO
PRI
CPCAP
R3010
R3123
SYSRSTRTB_CPCAP
RESETB
SPI0_CS2_CPCAP_INV
STANDBYPRI
DC_SW3_1.8V
INTPRI
SPI0_MISO
PRISPIVCC
DVFS
AUDIO_SSI_FSYNC
DC_SW3_1.8V
SPI0_CLK
SPI0_MOSI
WDI
SYSRSTRTB
AUDIO_SSI_DATA_TX
AUDIO_SSI_DATA_RX
AUDIO_SSI_CLK_SHIELD
IN
OUT
IN
IN
OUT
OUT
IN
IN
OUT
IN
IN
OUT
OUT
ONE WIRE
CPCAP
C3100
R3106
C3101
ONEWIRE_GCAI
BATT_DATA
ROD_TTR
IN
IO
IN
TP_LOWBATB
USB0_DP_CPCAP_SHIELD
USB0_DM_CPCAP_SHIELD
DP_GPIO1_GCAI_CPCAP_SHIELD
DM_GPIO2_GCAI_CPCAP_SHIELD
LOWBATB
ADTRIG
J14
M12
R13
T10
M10
P10
V14
R11
R12
T13
M9
T8
K16
V18
T15
P13
R14
N16
P12
T11
M11
A4
D1
G18
F18
P11
N2
A3
F1
T16
W14
1
NC
NC
NC
NC
IN
OUT
R3101
DC_LIN_5V
J11
B13
R6
T6
NC
GPIO
CPCAP
GCAI
*R3003 PLACED FOR INTERNAL MUXING(BELIZE)
*R3003 REMOVED AS BELIZE 8900 NO REUNION
*R3004 PLACED FOR 19.2MHZ
*2 CELL LOW EOD
*R3004 DNP FOR 38.4MHZ
DNP
R3502
R3501
R3108
R3107
VC
PRISPIVCC
GPIO4_GCAI
USBGPIOSW
HIP
GPIO2_GCAI
GPIO1_GCAI
GPIO3_GCAI
GPIO0_GCAI
DC_LIN_5V
NC
NC
IO
IO
IO
OUT
Y20
Y19
W20
B20
A20
E8
F6
E18
M15
V8
H16
K15
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
TESTEN_P1
TESTEN_P2
TESTVAN2_P1
TESTVAN2_P2
TESTVAN2_P3
NC
SPARE_P1
NC
NC
NC
NC
NC
CLK32KHZMCU
L14
H14
L7
L16
K14
J12
L12
NC
NC
NC
UART PINS
CTS_HOST1
RTS_HOST1
RXD_HOST12
TXD_HOST1
CLK32KHZ
CLK32KHZMCU
RX_LOW_LAT
OUT
NC
NC
USB PINS FROM MUX
XCVRGND
DP_NC
DM
HDM_DP
HDP
LOWBATB
ADTRIG
FLASHTRIG
RESETB
SYSRSTRTB
WDI
19.2MHZ
USB
CPCAP
U3000
CLK_ROD_19_2MHZ_SHIELD
VGCAIEN
ESW2EN
P6
H6
D3
F16
E15
C3
U18
F15
E16
NC
NC
NC
NC
NC
INTERFACE AND
CONFIGRATION
CPCAP4
1-WireAUDIO SSI
SCALING
DYNAMIC VOLTAGE
PROCESSOR
PRIMARY SPI
GPIO9
GPIO8
SCL4
SDA4
SDA1
SCL1
TX0
BITCLK0
RX0
FSYNC0
STANDBYPRI
INTPRI
PRIMISO
PRICE
PRIMOSI
PRISPICLK
PRISPIVCC_P2
PRISPIVCC_P3
PRIMCUVCC
PRISPIVCC_P1
ONEWIREM
ONEWIRED
ONEWIRE1
ONEWIRE2
MACEKEY
MACECLK
FAULT2
ESW2CLK
ESW2EN
REFCLKIN
VGCAIEN
ILIMSEL
ESW1CLK
M14
C15
P14
C17
G13
G12
F12
F13
J6
G7
F7
G14
F14
V9
N7
P7
R7
R8
P8
R9
P9
G15
L15
G6
G8
F8
A13
H15
R3004
C3102
CONFIG2
VC
CONFIG1
DC_SW3_1.8V
NC
NC
NC
NC
NC
NC
NC
GPIO
STATIC CONFIGURATION PINS
SECONDARY SPI
SKIP_DISABLE
BATVAR
CLK32KSTRTUP
CLKPGMS1
CLKPGMS0
ON_TYPE
CHRGMODE
CONFIG2
CONFIG1
PGM1
UNG
PGM2
PGM0
GPIO7
GPIO6
GPIO5
GPIO2
GPIO1
GPIO0
GPIO4
GPIO3
INTSEC
STANDBYSEC
SECMOSI
SECSPICLK
SECCE
SECMISO
SECSPIVCC
R3171
R3174
C3181
R3175
C3171
C3172
EAR_P
EAR_M_IN1
EAR_M
EAR_P_IN1
HIGH - AUDIO PA ON
LOW - AUDIO PA OFF
R3186
C3176
R3367
R3185
PA_MUTE
EXT_PA_MUTE
DC_RAWB+
PA_MODE
3
1
4
5
2
IN
E2
B1
E1
C2
C1
IN
U3170
C3175
R3170
SVR
INLNEG
INLPOS
EXT_PA_MODE
6
2
8
5
1
3
4
7
G1
VCC
IN_POS
SVR
MODE
GND
CTGND
IN_NEG
OUT_POS
OUT_NEG
E3105
C3179
C3120
DC_RAWB+
DNP
DNP
R3181
C3177
EXT_SPKR_M
EXT_SPKR_P
EXT_SPKR_FIL
OUT
OUT
R3182
R3176
C3173
PA_IN_SE_3
LINE_OUT
PA_IN_SE_1
DNP
R3183
PA_IN_SE_2
INT_MUTE
INT_SHDN
R3178
C3387
R3180
C3388
Q3179
R3374
EN_INT_SPKR
PA_MUTE
3
1
4
5
2
E2
B1
E1
C2
C1
C3368
R3353
BIAS
R3006
C3366
C3178
C3174
SYNC
SCLK
AUDIO
D3000
U3350
C3367
C3411
DC_SW_BP_3.6V_DIG
DC_SW_BP_3.6V
DC_SW_BP_3.6V_DIG
14
16
3
13
12
19
6
5
2
1
18
17
20
8
7
4
15
10
23
24
BOOT_NEG
VDD
OUT_NEG2
OUT_NEG1
OUT_POS2
EP
PGND2
PGND1
GND2
GND1
ADDR1
BIAS
MUTE
SHDN
IN
FB
SYNC
SCLK
SDA_VOL
BOOT_POS
PVDD2
ADDR2
PVDD1
SYNCOUT
OUT_POS1
22
21
11
9
25
C3369
C3370
BOOT_POS
INT_SPKR_NEG
INT_SPKR_POS
NC
DNP
R3355
R3354
BOOT_NEG
SDA_VOL
DC_SW_BP_3.6V_DIG
C3391
C3390
C3372
E3306
C3373
R3359
E3307
R3358
INT_SPKR_M
INT_P_FIL
INT_M_FIL
INT_SPKR_P
OUT
OUT
PRI_SPI_CS INVERTER
C3160
U3160
SPI0_CS2_CPCAP SPI0_CS2_CPCAP_INV
PRISPIVCC
5
4
1
2
3
NC
OUT
GND
NC
VCC
IN
IN
AUDIO PA
RAWB+_PA_VDD
MIC_GND MUST FOLLOW THE TRACES OF INT_MIC AND EXT_MIC PATH
MIC
PATH
CPCAP
EXT_MIC
INT_MIC
MIC_GND
IN
IN
IN
C3110
R3370
C3111
C3112
C3200
MIC_IN_1R
BANDGAP_BYPASS
EN_INT_SPKR
EXT_MIC_IN_HS
V1
W11
W2
V2
V3
Y3
W4
W3
W13
K12
R10
N15
P15
P2
NC
NC
NC
NC
NC
19.2MHZ
CODEC
CPCAP
C3104
C3105
C3107
C3106
VRFE_AUD_TX
VRFE_PLL
CLK_ROD_19_2MHZ_SHIELD
VAUDIO
P19
U2
U1
C3103
E3100
MIC_BIAS_1R
Y2
Y1
W1
V5
R15
R16
V6
EXTERNAL AUDIO
AUDIO
CPCAP4
MICROPHONES
PA ENABLES
AUDIO LDO
BANDGAP_BYPASS
AUD_GND_P1
AUD_GND_P2
AUD_GND_P3
AUD_GND_P5
AUD_GND_TESTVAN3_P1
AUD_GND_TESTVAN3_P2
AUD_GND_TESTVAN3_P3
VAUDIO
MIC_BIAS_2
EAPAEN2
HS_INT
PTT_DET
EAPAEN1
MIC_IN_2L
MIC_BIAS_1R
MIC_IN_1R
MIC_IN_HS
MIC_BIAS_1L
VREF_AUD_TX
CLK_IN1
CLK_IN0
VAUDIOIN
VREF_PLL
C3114
C3115
R3115
C3116
C3126
EAR_P
EAR_M
VAUDIO_RX
CP_VDD
VAUDIO
LINE_OUT
NC
NC
NC
NC
NC
NC
NC
C3127
C3128
LDSP_R
LDSP_L
Y13
Y11
V13
V11
W12
V12
NC
NC
NC
NC
LOUD SPEAKER LEFT
LDSP_L_VIN_P1
LDSP_L_GND_P2
LDSP_L_GND_P1
LDSP_LM
LDSP_LP
LDSP_L_VIN_P2
U3000
C3113
R3116
VREF_AUD_RX
V4
R18
W10
W17
W15
Y15
Y17
V15
V17
V16
W16
W8
W9
W7
Y8
Y10
Y4
Y6
W5
W6
V7
V10
LOUD SPEAKER RIGHT
HEADSET
EARPIECE
VDD_AUD_RX1
VREF_AUD_RX_TESTVAN1
EARM
HS_R_OUT
HS_L_OUT
AUD_GND_P6
LDSP_R_GND_P2
LDSP_R_GND_P1
LDSP_R_VIN_P1
LDSP_R_VIN_P2
LDSP_RM
LDSP_RP
CP_VDD
HS_VSS
CP_NEG_VOUT
CP_FLYM
CP_FLYP
LINE_OUT_R
VDD_AUD_RX2
LINE_OUT_L
AUD_GND_P4
EARP
DC_SW_BP_3.6V
C3024
Q3170
Figure 8-13. Power Management and Audio Schematic Diagram (2 of 3)
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